Log - fe2243bd92558bce509e55f551e63b3606e850cf - filogic/atf

d6cede3 Merge "feat(intel): enable SDMMC frontdoor load for ATF->Linux" into integration by Sandrine Bailleux · Fri Jan 19 11:08:14 2024 +0100
477aef4 feat(intel): support wipe DDR after calibration by Jit Loon Lim · Mon Aug 14 13:12:01 2023 +0800
c5a3e3a feat(intel): enable SDMMC frontdoor load for ATF->Linux by Jit Loon Lim · Mon Oct 16 00:19:34 2023 +0800
11b9b49 refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 by Arvind Ram Prakash · Tue Nov 22 14:41:00 2022 -0600
55803a2 fix(intel): fix UART baud rate and clock by Sieu Mun Tang · Fri Jul 01 09:08:57 2022 +0800
dce970c build(stratix10): platform changes for verifying gpt header crc by Rohit Ner · Wed May 11 03:18:31 2022 -0700
044ed48 feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands by Sieu Mun Tang · Wed May 11 10:45:19 2022 +0800
1a832bf Merge "feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC" into integration by Madhukar Pappireddy · Fri May 06 19:33:59 2022 +0200
a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · Wed Apr 06 10:19:16 2022 +0800
e026eea feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC by Sieu Mun Tang · Thu May 05 23:42:55 2022 +0800
2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 05 22:40:46 2020 +0800
1205ef0 feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · Thu Aug 06 10:21:54 2020 +0800
dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · Mon Mar 07 12:13:04 2022 +0800
f3a5d02 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · Mon Jun 29 12:15:27 2020 +0800
9f22cbf build(intel): initial commit for crypto driver by Sieu Mun Tang · Wed Mar 02 11:04:09 2022 +0800
6474096 intel: mailbox: Ensure time out duration is predictive by Chee Hong Ang · Mon May 11 00:55:01 2020 +0800
0ae8d9a intel: platform: Include GICv2 makefile by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 19 14:50:01 2020 +0800
8d9e891 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · Wed Oct 02 13:49:25 2019 +0800
36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · Tue Dec 24 10:42:52 2019 +0800
8ebd237 intel: System Manager refactoring by Hadi Asyrafi · Mon Dec 23 17:58:04 2019 +0800
67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · Mon Dec 23 13:25:33 2019 +0800
5ae876f intel: Refactor common platform code [5/5] by Hadi Asyrafi · Wed Oct 23 17:58:06 2019 +0800
4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · Wed Oct 23 17:35:32 2019 +0800
6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · Wed Oct 23 18:34:14 2019 +0800
f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · Wed Oct 23 17:02:55 2019 +0800
9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · Wed Oct 23 16:26:53 2019 +0800
309ac01 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 14:48:39 2019 +0800
6a240c7 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 15:21:20 2019 +0800
636a913 Merge changes from topic "av/console-port" into integration by Paul Beesley · Fri Jun 28 11:04:02 2019 +0000
55828d5 Remove MULTI_CONSOLE_API flag and references to it by Ambroise Vincent · Thu Apr 04 09:13:28 2019 +0100
c461add intel: Pull out common drivers into platform common by Hadi Asyrafi · Wed Jun 12 11:24:12 2019 +0800
c0d4d93 intel: Enable watchdog timer on Intel S10 platform by Muhammad Hadi Asyrafi Abdul Halim · Tue Mar 19 17:59:06 2019 +0800
2444bfa intel: QSPI boot enablement by Muhammad Hadi Asyrafi Abdul Halim · Fri Mar 08 19:02:33 2019 +0800
ab34f74 plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform by Tien Hock, Loh · Tue Feb 26 09:25:14 2019 +0800
59400a4 plat: intel: Add BL2 support for Stratix 10 SoC by Loh Tien Hock · Mon Feb 04 16:17:24 2019 +0800