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f860f273567903e1280bb15055ebbbc157ca87a8
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aarch32
20be077
Changes to support updated register usage in SMCCC v1.2
by Madhukar Pappireddy
· Sat Nov 09 23:28:08 2019 -0600
d2f21b8
Add missing support for BL2_AT_EL3 in XIP memory
by Lionel Debieve
· Mon May 27 09:32:00 2019 +0200
9074dea
AArch32: Disable Secure Cycle Counter
by Alexei Fedorov
· Tue Aug 20 15:22:44 2019 +0100
53456fc
Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
by Julius Werner
· Tue Jul 09 13:49:11 2019 -0700
5553417
SSBS: init SPSR register with default SSBS value
by John Tsichritzis
· Tue Jul 23 11:12:41 2019 +0100
35e08da
console: update skeleton
by Ambroise Vincent
· Fri May 31 16:21:59 2019 +0100
007d745
arch: add some defines for generic timer registers
by Yann Gautier
· Wed Apr 17 13:47:07 2019 +0200
457c64e
aarch32: Allow compiling with soft-float toolchain
by Manish Pandey
· Mon Apr 01 15:27:18 2019 +0100
0a0ca8b
Console: remove deprecated finish_console_register
by Ambroise Vincent
· Wed Mar 27 15:45:35 2019 +0000
f5fdfbc
Cortex-A53: Workarounds for 819472, 824069 and 827319
by Ambroise Vincent
· Thu Feb 21 14:16:24 2019 +0000
404184d
Merge pull request #1831 from antonio-nino-diaz-arm/an/sccd
by Antonio Niño Díaz
· Wed Feb 27 09:21:42 2019 +0000
078e66f
plat/arm: Support for Cortex A5 in FVP Versatile Express platform
by Usama Arif
· Wed Dec 12 17:14:29 2018 +0000
b69ac08
Division functionality for cores that dont have divide hardware.
by Usama Arif
· Wed Dec 12 17:08:33 2018 +0000
3fbd3f5
Disable processor Cycle Counting in Secure state
by Antonio Nino Diaz
· Mon Feb 18 16:55:43 2019 +0000
d29d21e
drivers: generic_delay_timer: Assert presence of Generic Timer
by Antonio Nino Diaz
· Wed Feb 06 09:23:04 2019 +0000
c326c34
xlat v2: Dynamically detect need for CnP bit
by Antonio Nino Diaz
· Fri Jan 11 11:20:10 2019 +0000
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· Fri Dec 14 00:18:21 2018 +0000
8d1ade6
Reorganize architecture-dependent header files
by Antonio Nino Diaz
· Mon Dec 17 17:20:57 2018 +0000