Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
f797cea54e58775043322182c6cf18a403dc41f5
/
plat
/
juno
/
bl2_plat_setup.c
f797cea
Rationalize UART usage among different BL stages
by Soby Mathew
· 10 years ago
21b0419
Juno: Read primary CPU MPID from SCC GPR_1
by Juan Castillo
· 10 years ago
798140d
Juno: Implement initial platform port
by Sandrine Bailleux
· 10 years ago