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git01.mediatek.com / filogic / atf / f6601049ef5e5415b6df44f0bfc7cbe205267e87 / plat / xilinx / zynqmp / include
  1. 1209b26 zynqmp: Remove dead code by Soren Brinkmann · Wed Nov 16 15:50:14 2016 -0800
  2. 7ac746c zynqmp: Increase MAX_XLAT_TABLES by Soren Brinkmann · Mon Jul 25 10:33:53 2016 -0700
  3. 802ba1d zynqmp: Change default BL31 address space by Soren Brinkmann · Fri Jul 15 06:23:37 2016 -0700
  4. 6d1ba58 zynqmp: Separate code and rodata by Soren Brinkmann · Fri Jul 08 14:45:14 2016 -0700
  5. 845cd5c zynqmp: Reduce mapped memory area by Soren Brinkmann · Fri Apr 22 10:02:46 2016 -0700
  6. 4a9ca04 zynqmp: Revise memory configuration options by Soren Brinkmann · Thu Apr 14 10:27:00 2016 -0700
  7. 2c7ed5b Dump platform-defined regs in crash reporting by Gerald Lejeune · Thu Nov 26 15:47:53 2015 +0100
  8. 76fcae3 Add support for Xilinx Zynq UltraScale+ MPSOC by Soren Brinkmann · Sun Mar 06 20:16:27 2016 -0800