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git01.mediatek.com / filogic / atf / f4c1c8a6aee2c5b625cf83a283f109e64f956eb6 / plat / nvidia / tegra
  1. 6fb7880 Merge pull request #508 from soby-mathew/sm/debug_xlat by danh-arm · Mon Feb 01 19:06:57 2016 +0000
  2. c9bac9c Use tf_printf() for debug logs from xlat_tables.c by Soby Mathew · Tue Jan 19 17:52:28 2016 +0000
  3. e7ae6db Disable PL011 UART before configuring it by Juan Castillo · Thu Nov 26 14:52:15 2015 +0000
  4. 33f5c41 Include psci.h from tegra platform header by Yatharth Kochar · Wed Dec 09 14:22:47 2015 +0000
  5. a78bb1b Tegra: remove support for legacy platform APIs by Varun Wadekar · Fri Aug 07 10:03:00 2015 +0530
  6. b2baa89 Tegra: flowctrl: rename tegra_fc_cpu_idle() to tegra_fc_cpu_powerdn() by Varun Wadekar · Thu Aug 27 10:25:29 2015 +0530
  7. 8b82fae Tegra: introduce per-soc system reset handler by Varun Wadekar · Mon Nov 09 17:39:28 2015 -0800
  8. 4489ad1 Tegra: Perform cache maintenance on video carveout memory by Vikram Kanigiri · Thu Sep 10 14:12:36 2015 +0100
  9. 1be2f97 Tegra: fix logic to clear videomem regions by Varun Wadekar · Wed Aug 26 15:06:14 2015 +0530
  10. 4e9c231 Tegra210: wait for 512 timer ticks before retention entry by Varun Wadekar · Fri Aug 21 15:56:02 2015 +0530
  11. 4375028 Merge pull request #360 from vwadekar/tegra-platform-def-v2 by danh-arm · Wed Aug 12 09:54:25 2015 +0100
  12. 88c4d22 Tegra: fix PLATFORM_{CORE_COUNT|NUM_AFFS} macros by Varun Wadekar · Wed Aug 12 09:24:50 2015 +0530
  13. e1eaf8e Tegra: memmap the actual memory available for BL31 by Varun Wadekar · Tue Aug 11 14:20:14 2015 +0530
  14. e98a146 Tegra132: set TZDRAM_BASE to 0xF5C00000 by Varun Wadekar · Fri Jul 31 10:15:41 2015 +0530
  15. c8bfe2e Tegra: retrieve BL32's bootargs from bl32_ep_info by Varun Wadekar · Fri Jul 31 10:03:01 2015 +0530
  16. bc78744 Tegra210: enable WRAP to INCR burst type conversions by Varun Wadekar · Mon Jul 27 13:00:50 2015 +0530
  17. c39b0ba Tegra: modify 'BUILD_PLAT' to point to soc specific build dirs by Varun Wadekar · Tue Jul 21 10:16:13 2015 +0530
  18. 0f3baa0 Tegra: Support for Tegra's T132 platforms by Varun Wadekar · Thu Jul 16 11:36:33 2015 +0530
  19. 254441d Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · Thu Jul 23 10:07:54 2015 +0530
  20. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · Tue Jul 21 11:53:35 2015 +0530
  21. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · Thu Jul 16 09:46:28 2015 +0530
  22. 6cab707 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · Thu Jul 16 11:58:19 2015 +0530
  23. 30d8977 Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · Thu Jul 16 10:38:11 2015 +0530
  24. fccf8e0 Tegra: PMC: check if a CPU is already online by Varun Wadekar · Thu Jul 16 10:35:12 2015 +0530
  25. 071b787 Tegra210: deassert CPU reset signals during power on by Varun Wadekar · Wed Jul 08 17:42:02 2015 +0530
  26. 85a90cf Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · Wed Jul 08 13:46:42 2015 +0530
  27. bc74fec Tegra: introduce delay timer support by Varun Wadekar · Thu Jul 16 15:47:03 2015 +0530
  28. 207cc73 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · Wed Jul 08 12:57:50 2015 +0530
  29. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · Fri Jul 03 16:31:28 2015 +0530
  30. d3a4150 Add missing features to the Tegra GIC driver by Varun Wadekar · Tue Jun 16 11:23:00 2015 +0530
  31. f9aae8b Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · Thu Jun 18 14:58:33 2015 +0100
  32. 7a269e2 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · Wed Jun 10 14:04:32 2015 +0530
  33. 52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · Fri Jun 05 12:57:27 2015 +0530
  34. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · Tue May 19 16:48:04 2015 +0530