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git01.mediatek.com / filogic / atf / f4110247c0dae0eea431cdc9ff8f5b6b27ee3fb6 / lib / extensions
  1. 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · 4 years, 1 month ago
  2. 3dd9f2b TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U by Alexei Fedorov · 4 years, 9 months ago
  3. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · 4 years, 10 months ago
  4. 72065ec Fix Coverity #342970, Uninitialized scalar variable by Justin Chadwell · 5 years ago
  5. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · 5 years ago
  6. bdfa103 MPAM: enable MPAM EL2 traps by Louis Mayencourt · 5 years ago
  7. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  8. 033b4bb Fix MISRA defects in extension libs by Antonio Nino Diaz · 6 years ago
  9. 5753e49 Mark BL31 initialization functions by Daniel Boulby · 6 years ago
  10. 067a357 RAS: Fix assert condition by Jeenu Viswambharan · 6 years ago
  11. 69ac42b Merge pull request #1532 from jeenu-arm/misra-fixes by Dimitris Papastamos · 6 years ago
  12. 31ac01e RAS: MISRA fixes by Jeenu Viswambharan · 6 years ago
  13. 2da918c AArch64: Enable MPAM for lower ELs by Jeenu Viswambharan · 6 years ago
  14. d51f80f RAS: ras_common: Add null pointer check for error record probe function by Sughosh Ganu · 6 years ago
  15. d86cc5b RAS: Allow individual interrupt registration by Jeenu Viswambharan · 7 years ago
  16. 2e2e881 RAS: Add support for node registration by Jeenu Viswambharan · 7 years ago
  17. 19f6cf2 RAS: Add helpers to access Standard Error Records by Jeenu Viswambharan · 7 years ago
  18. b8d8145 Merge pull request #1282 from robertovargas-arm/misra-changes by davidcunado-arm · 6 years ago
  19. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · 6 years ago
  20. aaa1985 MISRA fixes for AMU/SPE and SVE by Dimitris Papastamos · 6 years ago
  21. e0848e9 aarch32: Fix multiple bugs in amu_helpers.S by Dimitris Papastamos · 6 years ago
  22. 430f115 Assert that group0/group1 counter config is what we expect by Dimitris Papastamos · 6 years ago
  23. 5e8cd79 Implement {spe,sve}_supported() helpers and refactor code by Dimitris Papastamos · 6 years ago
  24. 0dcdd8d AMU: Implement context save/restore for aarch32 by Joel Hutton · 7 years ago
  25. 2691bc6 AMU: Add assembler helper functions for aarch32 by Joel Hutton · 7 years ago
  26. 7c4a6e6 AMU: Remove unnecessary WARN() by Dimitris Papastamos · 6 years ago
  27. eaf3e6d AMU: Add hooks to save/restore AMU context by Dimitris Papastamos · 7 years ago
  28. 525c37a AMU: Add configuration helpers for aarch64 by Dimitris Papastamos · 7 years ago
  29. 60346db AMU: Add plat interface to select which group 1 counters to enable by Dimitris Papastamos · 7 years ago
  30. ce88eee Enable SVE for Non-secure world by David Cunado · 7 years ago
  31. dda48b0 AMU: Implement support for aarch32 by Dimitris Papastamos · 7 years ago
  32. e08005a AMU: Implement support for aarch64 by Dimitris Papastamos · 7 years ago
  33. 5bdbb47 Refactor Statistical Profiling Extensions implementation by Dimitris Papastamos · 7 years ago