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git01.mediatek.com / filogic / atf / f30bf68e9bcfdc531ad98c83edb196fcd4af2500 / plat / rockchip / rk3399 / drivers / pmu / m0_ctl.h
  1. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
  2. 00960ba rockchip/rk3399: Split M0 binary into two by Lin Huang · 6 years ago
  3. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  4. b4a7676 rockchip: rk3399: improve the m0 enable flow by Lin Huang · 8 years ago
  5. 93280b7 rk3399: dram: use PMU M0 to do ddr frequency scaling by Xing Zheng · 8 years ago[Renamed (83%) from plat/rockchip/rk3399/drivers/pmu/rk3399m0.h]
  6. b400374 rockchip: add M0 source code and build system for RK3399 by Caesar Wang · 8 years ago