Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
f2de68193c2eb2b069a0a9b9aeec82b173e7d90a
/
plat
/
nvidia
/
tegra
/
soc
/
t210
/
platform_t210.mk
8b1068b
Tegra: platform specific GIC sources
by Varun Wadekar
· 4 years, 7 months ago
0c9105e
Tegra: reorganize drivers and lib folders
by Varun Wadekar
· 5 years ago
26dfb51
Tegra: include platform headers from individual makefiles
by Varun Wadekar
· 6 years ago
98275da
Tegra210: rename ENABLE_WDT_LEGACY_FIQ_HANDLING macro
by Varun Wadekar
· 6 years ago
65f8394
Tegra210: disable ERRATA_A57_829520
by Mithun Maragiri
· 6 years ago
976dc98
Tegra210: enable higher performance non-cacheable load forwarding
by Varun Wadekar
· 6 years ago
29b4665
Tegra: compile PMC driver for Tegra132/Tegra210 platforms
by Varun Wadekar
· 6 years ago
be57abb
spd: trusty: memmap trusty's code memory before peeking
by Varun Wadekar
· 6 years ago
a1ad9b7
Tegra210: SiP handlers to allow PMC access
by kalyani chidambaram
· 7 years ago
ba31328
Tegra210: support for cluster idle from the CPU
by Varun Wadekar
· 7 years ago
c6041c9
Tegra: fiq_glue: support to handle LEGACY_FIQ PPIs for Tegra SoCs
by Varun Wadekar
· 7 years ago
50a3303
Tegra: console driver compilation from platform makefiles
by Varun Wadekar
· 7 years ago
24ea656
Tegra210: increase number of dynamic memory mappings
by Varun Wadekar
· 7 years ago
7baa94a
Tegra210: increase MAX_XLAT_TABLES and MAX_MMAP_REGIONS
by Varun Wadekar
· 7 years ago
a6a357f
Tegra210: bpmp: power management interface
by Varun Wadekar
· 7 years ago
21eea97
Tegra210B01: SE1 and SE2/PKA1 context save (atomic)
by Marvin Hsu
· 7 years ago
9f4a7d3
Tegra: support for native GICv2 drivers
by Varun Wadekar
· 6 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 7 years ago
4d160ac
Tegra: memmap Tegra micro-seconds timer controller
by Steven Kao
· 8 years ago
1108fc6
plat/tegra: Enable Cortex-A53 erratum 855873 workaround
by Andre Przywara
· 8 years ago
ed3c62b
Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs
by Varun Wadekar
· 8 years ago
1edb882
Tegra210: new TZDRAM base address
by Varun Wadekar
· 8 years ago
923d04a
Tegra: handlers for common and SoC-specific SiP calls
by Varun Wadekar
· 9 years ago
d2014c6
Tegra: init normal/crash console for platforms
by Varun Wadekar
· 9 years ago
7a9a285
Tegra: Memory Controller Driver (v1)
by Varun Wadekar
· 9 years ago
b24dea9
Tegra: enable processor retention and L2/CPUECTLR access
by Varun Wadekar
· 9 years ago
97f2490
Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform
by Varun Wadekar
· 9 years ago
cbdace1
Tegra: SoC specific SiP handlers
by Varun Wadekar
· 9 years ago
a1176ba
Tegra: include flowctlr driver from SoC specific makefiles
by Varun Wadekar
· 9 years ago
4e9c231
Tegra210: wait for 512 timer ticks before retention entry
by Varun Wadekar
· 9 years ago
5f4e643
Tegra: T210: include CPU files from SoC's platform.mk
by Varun Wadekar
· 9 years ago
d1b6150
Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs
by Varun Wadekar
· 9 years ago
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· 9 years ago