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git01.mediatek.com / filogic / atf / f270d6bfaecd1c576be2852cd95ac60fea3cf55f / plat / nvidia / tegra / common
  1. 3fb854f Tegra: enable SEPARATE_CODE_AND_RODATA build flag by Varun Wadekar · Tue Feb 28 08:23:59 2017 -0800
  2. e0f3dfd Tegra: SiP: 64-bit address for Video Memory base by Harvey Hsieh · Tue Oct 11 18:59:52 2016 +0800
  3. 777baa5 Tegra: init the console only if the platform supports it by Damon Duan · Mon Nov 07 19:37:50 2016 +0800
  4. 14eaede Tegra: calculate proper power state for affinity levels by Varun Wadekar · Thu Sep 01 14:51:59 2016 -0700
  5. a2c6be6 Tegra: uninit and re-init console across System Suspend by Varun Wadekar · Mon Aug 01 22:16:21 2016 -0700
  6. 28dcc21 Tegra: support for silicon/simulation platforms by Varun Wadekar · Wed Jul 20 10:28:51 2016 -0700
  7. f2aa1be Tegra: per-soc `get_target_pwr_state` handler by Varun Wadekar · Tue Jun 07 12:00:06 2016 -0700
  8. b41a414 Tegra: relocate BL32 image to TZDRAM memory by Varun Wadekar · Mon May 23 15:56:14 2016 -0700
  9. d22d4ad Tegra: get BL31 arguments from previous bootloader by Varun Wadekar · Mon May 23 11:41:07 2016 -0700
  10. 197a75f Tegra: return BL32 entry point info if it is valid by Varun Wadekar · Mon Jun 06 10:46:28 2016 -0700
  11. 5118b53 Tegra: configure TZDRAM fence during early setup by Varun Wadekar · Sat Jun 04 22:08:50 2016 -0700
  12. d5f578a Tegra: restore TZRAM settings on "System Resume" by Varun Wadekar · Wed Jun 01 19:34:37 2016 -0700
  13. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · Thu May 12 13:43:33 2016 -0700
  14. c6c386d Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1 by Varun Wadekar · Fri May 20 16:21:22 2016 -0700
  15. dc79930 Tegra: implement FIQ interrupt handler by Varun Wadekar · Mon Dec 28 16:36:42 2015 -0800
  16. b7b4575 Tegra: GIC: enable FIQ interrupt handling by Varun Wadekar · Mon Dec 28 14:55:41 2015 -0800
  17. 2497539 Tegra: implement common handler `plat_get_target_pwr_state()` by Varun Wadekar · Thu May 05 14:13:30 2016 -0700
  18. 25e658e Tegra: include platform_def.h to access UART macros by Varun Wadekar · Tue Apr 26 11:38:38 2016 -0700
  19. 2330edd Tegra: allow SiP smc calls from Secure World by Wayne Lin · Thu Mar 31 13:49:09 2016 -0700
  20. 3f0a8ad Tegra: handler for per-soc early setup by Varun Wadekar · Mon Mar 28 15:56:47 2016 -0700
  21. 1ec441e Tegra: relocate code to BL31_BASE during cold boot by Varun Wadekar · Thu Mar 24 15:34:24 2016 -0700
  22. d22429d Tegra: implement pwr_domain_pwr_down_wfi() handler by Varun Wadekar · Fri Mar 18 14:35:28 2016 -0700
  23. d151363 Tegra: memmap BL31's TZDRAM carveout by Varun Wadekar · Fri Mar 18 13:01:12 2016 -0700
  24. 6eec6d6 Tegra: allow individual SoCs to restore their settings by Varun Wadekar · Thu Mar 03 13:28:10 2016 -0800
  25. 6077dce Tegra: enable PSCI extended state ID processing by Varun Wadekar · Wed Jan 27 11:31:06 2016 -0800
  26. 0dc9181 Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM by Varun Wadekar · Wed Dec 30 15:06:41 2015 -0800
  27. 1dcffa9 Tegra: enable runtime console by Varun Wadekar · Fri Jan 08 17:48:42 2016 -0800
  28. e5caeed Tegra: PM: soc-specific system off handler by Varun Wadekar · Thu Jan 07 14:04:21 2016 -0800
  29. 923d04a Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · Wed Dec 09 18:18:53 2015 -0800
  30. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · Thu Oct 29 10:37:28 2015 +0530
  31. 6bb6246 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · Tue Oct 06 12:49:31 2015 +0530
  32. 7a9a285 Tegra: Memory Controller Driver (v1) by Varun Wadekar · Fri Sep 18 11:21:22 2015 +0530
  33. baf903e Tegra: sanity check members of the "from_bl2" struct by Varun Wadekar · Tue Sep 22 15:00:06 2015 +0530
  34. 39f87d1 Tegra: use ClusterId for calculating core position by Varun Wadekar · Tue Sep 22 13:45:07 2015 +0530
  35. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · Tue Sep 22 13:33:56 2015 +0530
  36. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · Thu Sep 03 14:32:44 2015 +0530
  37. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · Tue Aug 25 17:01:06 2015 +0530
  38. a8954fc Replace some memset call by zeromem by Douglas Raillard · Thu Jan 26 15:54:44 2017 +0000
  39. 21362a9 Introduce unified API to zero memory by Douglas Raillard · Fri Dec 02 13:51:54 2016 +0000
  40. 0fac5af Move BL_COHERENT_RAM_BASE/END defines to common_def.h by Masahiro Yamada · Wed Dec 28 16:11:41 2016 +0900
  41. 1723113 Migrate platform makefile to new console driver location by Soby Mathew · Mon Aug 08 12:33:06 2016 +0100
  42. f6c4108 Include `plat_psci_common.c` from the new location by Soby Mathew · Tue May 03 12:31:18 2016 +0100
  43. cc037c1 Migrate platform ports to the new xlat_tables library by Soby Mathew · Fri Apr 08 16:42:58 2016 +0100
  44. e7ae6db Disable PL011 UART before configuring it by Juan Castillo · Thu Nov 26 14:52:15 2015 +0000
  45. a78bb1b Tegra: remove support for legacy platform APIs by Varun Wadekar · Fri Aug 07 10:03:00 2015 +0530
  46. b2baa89 Tegra: flowctrl: rename tegra_fc_cpu_idle() to tegra_fc_cpu_powerdn() by Varun Wadekar · Thu Aug 27 10:25:29 2015 +0530
  47. 8b82fae Tegra: introduce per-soc system reset handler by Varun Wadekar · Mon Nov 09 17:39:28 2015 -0800
  48. 4489ad1 Tegra: Perform cache maintenance on video carveout memory by Vikram Kanigiri · Thu Sep 10 14:12:36 2015 +0100
  49. 1be2f97 Tegra: fix logic to clear videomem regions by Varun Wadekar · Wed Aug 26 15:06:14 2015 +0530
  50. 4e9c231 Tegra210: wait for 512 timer ticks before retention entry by Varun Wadekar · Fri Aug 21 15:56:02 2015 +0530
  51. e1eaf8e Tegra: memmap the actual memory available for BL31 by Varun Wadekar · Tue Aug 11 14:20:14 2015 +0530
  52. c8bfe2e Tegra: retrieve BL32's bootargs from bl32_ep_info by Varun Wadekar · Fri Jul 31 10:03:01 2015 +0530
  53. 0f3baa0 Tegra: Support for Tegra's T132 platforms by Varun Wadekar · Thu Jul 16 11:36:33 2015 +0530
  54. 254441d Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · Thu Jul 23 10:07:54 2015 +0530
  55. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · Tue Jul 21 11:53:35 2015 +0530
  56. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · Thu Jul 16 09:46:28 2015 +0530
  57. 30d8977 Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · Thu Jul 16 10:38:11 2015 +0530
  58. fccf8e0 Tegra: PMC: check if a CPU is already online by Varun Wadekar · Thu Jul 16 10:35:12 2015 +0530
  59. 85a90cf Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · Wed Jul 08 13:46:42 2015 +0530
  60. bc74fec Tegra: introduce delay timer support by Varun Wadekar · Thu Jul 16 15:47:03 2015 +0530
  61. 207cc73 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · Wed Jul 08 12:57:50 2015 +0530
  62. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · Fri Jul 03 16:31:28 2015 +0530
  63. d3a4150 Add missing features to the Tegra GIC driver by Varun Wadekar · Tue Jun 16 11:23:00 2015 +0530
  64. f9aae8b Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · Thu Jun 18 14:58:33 2015 +0100
  65. 7a269e2 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · Wed Jun 10 14:04:32 2015 +0530
  66. 52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · Fri Jun 05 12:57:27 2015 +0530
  67. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · Tue May 19 16:48:04 2015 +0530