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git01.mediatek.com / filogic / atf / eb26f08527e1e0861fe2c50625b7b78f4e7fa1ba / include / drivers / nxp / clk / s32cc / s32cc-clk-modules.h
  1. eb26f08 feat(nxp-clk): add base address for PERIPH_DFS by Ghennadi Procopciuc · Mon Jan 20 16:02:21 2025 +0200
  2. 7d92763 feat(nxp-clk): add a basic get_rate implementation by Ghennadi Procopciuc · Fri Jan 10 16:26:21 2025 +0200
  3. d3cd783 feat(nxp-clk): add objects needed for DDR clock by Ghennadi Procopciuc · Tue Sep 17 09:02:24 2024 +0300
  4. 74dde09 feat(nxp-clk): setup the DDR PLL by Ghennadi Procopciuc · Mon Sep 09 10:24:35 2024 +0300
  5. d01fe9c feat(nxp-clk): add partitions objects by Ghennadi Procopciuc · Wed Sep 11 15:09:43 2024 +0300
  6. 22f9474 feat(nxp-clk): add PERIPH PLL enablement by Ghennadi Procopciuc · Tue Aug 06 11:48:11 2024 +0300
  7. 90c9000 feat(nxp-clk): add CGM0 instance by Ghennadi Procopciuc · Mon Aug 05 16:50:52 2024 +0300
  8. da5d270 feat(nxp-clk): add clock objects for ARM DFS by Ghennadi Procopciuc · Mon Aug 05 16:42:04 2024 +0300
  9. e6946b6 feat(nxp-clk): set rate for clock fixed divider by Ghennadi Procopciuc · Wed Jun 12 12:29:54 2024 +0300
  10. 2be71a3 feat(nxp-clk): add A53 clock objects by Ghennadi Procopciuc · Wed Jun 12 12:06:36 2024 +0300
  11. 907f654 feat(nxp-clk): set rate for PLL divider objects by Ghennadi Procopciuc · Wed Jun 12 12:00:15 2024 +0300
  12. e18cf33 feat(nxp-clk): set rate for PLL objects by Ghennadi Procopciuc · Wed Jun 12 11:55:32 2024 +0300
  13. 8384d18 feat(nxp-clk): add MC_CGM clock objects by Ghennadi Procopciuc · Wed Jun 12 10:53:06 2024 +0300
  14. aa45fa9 feat(nxp-clk): add set_parent callback by Ghennadi Procopciuc · Wed Jun 12 10:02:07 2024 +0300
  15. 7277b97 feat(nxp-clk): add clock objects for ARM PLL by Ghennadi Procopciuc · Wed Jun 12 09:53:18 2024 +0300
  16. 0d52577 feat(nxp-clk): implement set_rate for oscillators by Ghennadi Procopciuc · Wed Jun 12 08:09:19 2024 +0300
  17. ecc98d2 feat(nxp-clk): add oscillator clock objects by Ghennadi Procopciuc · Wed Jun 12 07:38:52 2024 +0300