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spd
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tspd
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tspd_main.c
9930501
Fix order of #includes
by Isla Mitchell
· Tue Jul 11 14:54:08 2017 +0100
f251a4c
Merge pull request #925 from dp-arm/dp/spdx
by davidcunado-arm
· Thu May 04 16:35:19 2017 +0100
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
7dc9133
Merge pull request #919 from davidcunado-arm/dc/smc_yielding_generic
by davidcunado-arm
· Tue May 02 16:32:20 2017 +0100
28f69ab
Update terminology: standard SMC to yielding SMC
by David Cunado
· Wed Apr 05 11:34:03 2017 +0100
acb2914
tspd:FWU:Fix usage of SMC_RET0
by Antonio Nino Diaz
· Tue Apr 04 17:08:32 2017 +0100
bcc3dd3
Fix TSPD implementation of STD SMC ABORT
by Douglas Raillard
· Fri Feb 03 18:01:51 2017 +0000
f212965
Abort preempted TSP STD SMC after PSCI CPU suspend
by Douglas Raillard
· Thu Nov 24 15:43:19 2016 +0000
f4119ec
Miscellaneous doc fixes for v1.2
by Sandrine Bailleux
· Thu Dec 17 13:58:58 2015 +0000
7866424
TSP: Allow preemption of synchronous S-EL1 interrupt handling
by Soby Mathew
· Fri Nov 13 02:08:43 2015 +0000
bec9851
Enable use of FIQs and IRQs as TSP interrupts
by Soby Mathew
· Thu Sep 03 18:29:38 2015 +0100
bc91282
Unify interrupt return paths from TSP into the TSPD
by Soby Mathew
· Tue Sep 22 12:01:18 2015 +0100
c5204fa
Remove the IMF_READ_INTERRUPT_ID build option
by Soby Mathew
· Tue Oct 27 10:01:06 2015 +0000
da43b66
PSCI: Migrate SPDs and TSP to the new platform and framework API
by Soby Mathew
· Wed Jul 08 21:45:46 2015 +0100
47903c0
Demonstrate model for routing IRQs to EL3
by Soby Mathew
· Tue Jan 13 15:48:26 2015 +0000
4dc4a47
Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs
by Juan Castillo
· Tue Aug 12 11:17:06 2014 +0100
4e81341
Support asynchronous method for BL3-2 initialization
by Vikram Kanigiri
· Tue Jul 15 16:49:22 2014 +0100
9d70f0f
Rework the TSPD setup code
by Vikram Kanigiri
· Tue Jul 15 16:46:43 2014 +0100
4e12607
Initialise CPU contexts from entry_point_info
by Andrew Thoelke
· Wed Jun 04 21:10:52 2014 +0100
a2f6553
Provide cm_get/set_context() for current CPU
by Andrew Thoelke
· Wed May 14 17:09:32 2014 +0100
93c89ec
Fix compilation issue for IMF_READ_INTERRUPT_ID build flag
by Soby Mathew
· Wed May 28 17:14:36 2014 +0100
459df4c
Merge pull request #110 from soby-mathew:sm/support_normal_irq_in_tsp-v4 into for-v0.4
by Dan Handley
· Tue May 27 18:46:22 2014 +0100
701fea7
Further renames of platform porting functions
by Dan Handley
· Tue May 27 16:17:21 2014 +0100
3d57851
Fixup Standard SMC Resume Handling
by Soby Mathew
· Tue May 27 10:20:01 2014 +0100
891c4ca
Use a vector table for TSP entrypoints
by Andrew Thoelke
· Tue May 20 21:43:27 2014 +0100
9f71f70
Non-Secure Interrupt support during Standard SMC processing in TSP
by Soby Mathew
· Fri May 09 20:49:17 2014 +0100
aeaab68
Add S-EL1 interrupt handling support in the TSPD
by Achin Gupta
· Fri May 09 13:21:31 2014 +0100
27b895e
Add context library API to change a bit in SCR_EL3
by Achin Gupta
· Sun May 04 18:38:28 2014 +0100
18d6eaf
Rework 'state' field usage in per-cpu TSP context
by Achin Gupta
· Sun May 04 18:23:26 2014 +0100
d8c9d26
Rework memory information passing to BL3-x images
by Vikram Kanigiri
· Fri May 16 18:48:12 2014 +0100
da56743
Populate BL31 input parameters as per new spec
by Vikram Kanigiri
· Tue Apr 15 18:08:08 2014 +0100
2bd4ef2
Reduce deep nesting of header files
by Dan Handley
· Wed Apr 09 13:14:54 2014 +0100
e2712bc
Always use named structs in header files
by Dan Handley
· Thu Apr 10 15:37:22 2014 +0100
714a0d2
Make use of user/system includes more consistent
by Dan Handley
· Wed Apr 09 13:13:04 2014 +0100
df1ddb5
Implement standard calls for TSP
by Jeenu Viswambharan
· Fri Feb 28 11:23:35 2014 +0000
7f36660
Implement late binding for runtime hooks
by Jeenu Viswambharan
· Thu Feb 20 17:11:00 2014 +0000
916a2c1
Rework arithmetic operations in Test Secure Payload
by Achin Gupta
· Sun Feb 09 23:11:46 2014 +0000
607084e
Add power management support in the SPD
by Achin Gupta
· Sun Feb 09 18:24:19 2014 +0000
375f538
Add Test Secure Payload Dispatcher (TSPD) service
by Achin Gupta
· Tue Feb 18 18:12:48 2014 +0000