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e2bc7f2
Tegra186: enable support for simulation environment
by Varun Wadekar
· 9 years ago
47ddd00
Tegra186: check MCE firmware version during boot
by Varun Wadekar
· 9 years ago
a9002bb
Tegra186: fix programming sequence for SC7/SC8 entry
by Varun Wadekar
· 9 years ago
698e7c6
Tegra186: program default core wake mask during CPU_SUSPEND
by Varun Wadekar
· 9 years ago
920fce8
Tegra186: clear the system cstate for offline core
by Varun Wadekar
· 9 years ago
ad2824f
Tegra186: mce: enable LATIC for chip verification
by Varun Wadekar
· 9 years ago
93bed2a
Tegra186: save/restore BL31 context to/from TZDRAM
by Varun Wadekar
· 9 years ago
a0f2697
Tegra186: re-configure MSS' client settings
by Varun Wadekar
· 9 years ago
b877615
Tegra186: implement support for System Suspend
by Varun Wadekar
· 9 years ago
3c95993
Tegra186: smmu: driver for the smmu hardware block
by Varun Wadekar
· 9 years ago
d66ee54
Tegra186: implement quasi power off (SC8) state
by Varun Wadekar
· 9 years ago
e26a55a
Tegra186: disable DCO operations for PSCI_CPU_OFF
by Varun Wadekar
· 9 years ago
cad7b08
Tegra186: register FIQ interrupt sources
by Varun Wadekar
· 9 years ago
e60f1bf
Tegra: memctrl_v2: check GPU state before VPR programming
by Varun Wadekar
· 9 years ago
8964509
Tegra186: fix per-cpu wake times for CPU power states
by Varun Wadekar
· 9 years ago
a7c1ea7
Tegra186: add Video memory carveout settings
by Varun Wadekar
· 9 years ago
4223657
Tegra186: support for C6/C7 CPU_SUSPEND states
by Varun Wadekar
· 9 years ago
c2c3a2a
Tegra186: support for the latest platform port handlers
by Varun Wadekar
· 9 years ago
38020c9
Tegra186: implement prepare_system_reset handler
by Varun Wadekar
· 9 years ago
a64806a
Tegra186: implement CPU_OFF handler
by Varun Wadekar
· 9 years ago
20c9429
Tegra186: update SYSCNT_FREQ to 31.25MHz
by Varun Wadekar
· 9 years ago
94d8532
Tegra186: relocate bl31.bin to the SYSRAM
by Varun Wadekar
· 9 years ago
782c83d
Tegra186: implement prepare_system_off handler
by Varun Wadekar
· 8 years ago
abd153c
Tegra186: power on/off secondary CPUs
by Varun Wadekar
· 9 years ago
59c3aa0
Tegra186: SiP calls to interact with the MCE driver
by Varun Wadekar
· 9 years ago
a0352ab
Tegra186: mce: driver for the CPU complex power manager block
by Varun Wadekar
· 8 years ago
921b906
Tegra186: platform support for Tegra "T186" SoC
by Varun Wadekar
· 9 years ago
1108fc6
plat/tegra: Enable Cortex-A53 erratum 855873 workaround
by Andre Przywara
· 8 years ago
ed3c62b
Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs
by Varun Wadekar
· 8 years ago
20e9fef
Tegra210: assert if afflvl0/1 have incorrect state-ids
by Harvey Hsieh
· 8 years ago
1edb882
Tegra210: new TZDRAM base address
by Varun Wadekar
· 8 years ago
dba8007
Tegra210: set core power state during cluster power down
by Varun Wadekar
· 8 years ago
b7b4575
Tegra: GIC: enable FIQ interrupt handling
by Varun Wadekar
· 9 years ago
6eec6d6
Tegra: allow individual SoCs to restore their settings
by Varun Wadekar
· 9 years ago
d43583c
cpus: denver: disable DCO operations from platform code
by Varun Wadekar
· 9 years ago
6077dce
Tegra: enable PSCI extended state ID processing
by Varun Wadekar
· 9 years ago
923d04a
Tegra: handlers for common and SoC-specific SiP calls
by Varun Wadekar
· 9 years ago
d2014c6
Tegra: init normal/crash console for platforms
by Varun Wadekar
· 9 years ago
7a9a285
Tegra: Memory Controller Driver (v1)
by Varun Wadekar
· 9 years ago
b24dea9
Tegra: enable processor retention and L2/CPUECTLR access
by Varun Wadekar
· 9 years ago
97f2490
Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform
by Varun Wadekar
· 9 years ago
cbdace1
Tegra: SoC specific SiP handlers
by Varun Wadekar
· 9 years ago
a1176ba
Tegra: include flowctlr driver from SoC specific makefiles
by Varun Wadekar
· 9 years ago
e82e29c
Implement plat_get_syscnt_freq2 on platforms
by Antonio Nino Diaz
· 8 years ago
3c0087a
Move `plat_get_syscnt_freq()` to arm_common.c
by Yatharth Kochar
· 9 years ago
a78bb1b
Tegra: remove support for legacy platform APIs
by Varun Wadekar
· 9 years ago
8b82fae
Tegra: introduce per-soc system reset handler
by Varun Wadekar
· 9 years ago
4e9c231
Tegra210: wait for 512 timer ticks before retention entry
by Varun Wadekar
· 9 years ago
e98a146
Tegra132: set TZDRAM_BASE to 0xF5C00000
by Varun Wadekar
· 9 years ago
bc78744
Tegra210: enable WRAP to INCR burst type conversions
by Varun Wadekar
· 9 years ago
0f3baa0
Tegra: Support for Tegra's T132 platforms
by Varun Wadekar
· 9 years ago
254441d
Tegra: implement per-SoC validate_power_state() handler
by Varun Wadekar
· 9 years ago
5f4e643
Tegra: T210: include CPU files from SoC's platform.mk
by Varun Wadekar
· 9 years ago
d1b6150
Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs
by Varun Wadekar
· 9 years ago
6cab707
Tegra210: lock PMC registers holding CPU vector addresses
by Varun Wadekar
· 9 years ago
071b787
Tegra210: deassert CPU reset signals during power on
by Varun Wadekar
· 9 years ago
81b1383
Implement get_sys_suspend_power_state() handler for Tegra
by Varun Wadekar
· 9 years ago
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· 9 years ago