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git01.mediatek.com / filogic / atf / e95aaa64d33b4e0bb5a51d0daaaf101fb270b981 / plat / nvidia / tegra / soc
  1. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · 9 years ago
  2. 6cab707 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · 9 years ago
  3. 071b787 Tegra210: deassert CPU reset signals during power on by Varun Wadekar · 9 years ago
  4. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · 9 years ago
  5. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · 9 years ago