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git01.mediatek.com / filogic / atf / e60f1bfe77105f243af3d5afe73576c7e5addd0f / plat / nvidia
  1. e60f1bf Tegra: memctrl_v2: check GPU state before VPR programming by Varun Wadekar · 8 years ago
  2. de729d6 Tegra: memctrl_v2: no SID override for SCE block by Varun Wadekar · 8 years ago
  3. 8964509 Tegra186: fix per-cpu wake times for CPU power states by Varun Wadekar · 8 years ago
  4. a7c1ea7 Tegra186: add Video memory carveout settings by Varun Wadekar · 8 years ago
  5. 4223657 Tegra186: support for C6/C7 CPU_SUSPEND states by Varun Wadekar · 8 years ago
  6. 13e7dc4 Tegra: memctrl_v2: secure the on-chip TZSRAM memory by Varun Wadekar · 9 years ago
  7. c2c3a2a Tegra186: support for the latest platform port handlers by Varun Wadekar · 9 years ago
  8. 38020c9 Tegra186: implement prepare_system_reset handler by Varun Wadekar · 9 years ago
  9. a64806a Tegra186: implement CPU_OFF handler by Varun Wadekar · 9 years ago
  10. 20c9429 Tegra186: update SYSCNT_FREQ to 31.25MHz by Varun Wadekar · 9 years ago
  11. 94d8532 Tegra186: relocate bl31.bin to the SYSRAM by Varun Wadekar · 9 years ago
  12. 782c83d Tegra186: implement prepare_system_off handler by Varun Wadekar · 7 years ago
  13. abd153c Tegra186: power on/off secondary CPUs by Varun Wadekar · 9 years ago
  14. 59c3aa0 Tegra186: SiP calls to interact with the MCE driver by Varun Wadekar · 9 years ago
  15. a0352ab Tegra186: mce: driver for the CPU complex power manager block by Varun Wadekar · 7 years ago
  16. 921b906 Tegra186: platform support for Tegra "T186" SoC by Varun Wadekar · 9 years ago
  17. cd5a2f5 Tegra: memctrl_v2: Memory Controller Driver (v2) by Varun Wadekar · 9 years ago
  18. fc9b91e Tegra: public interfaces to get the chip's major/minor versions by Varun Wadekar · 7 years ago
  19. 1108fc6 plat/tegra: Enable Cortex-A53 erratum 855873 workaround by Andre Przywara · 8 years ago
  20. ed3c62b Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs by Varun Wadekar · 7 years ago
  21. 3fb854f Tegra: enable SEPARATE_CODE_AND_RODATA build flag by Varun Wadekar · 7 years ago
  22. 20e9fef Tegra210: assert if afflvl0/1 have incorrect state-ids by Harvey Hsieh · 8 years ago
  23. e0f3dfd Tegra: SiP: 64-bit address for Video Memory base by Harvey Hsieh · 8 years ago
  24. 2c60b0a Tegra: increase ADDR_SPACE_SIZE to 35 bits by Steven Kao · 8 years ago
  25. 777baa5 Tegra: init the console only if the platform supports it by Damon Duan · 8 years ago
  26. 1edb882 Tegra210: new TZDRAM base address by Varun Wadekar · 8 years ago
  27. dba8007 Tegra210: set core power state during cluster power down by Varun Wadekar · 8 years ago
  28. 14eaede Tegra: calculate proper power state for affinity levels by Varun Wadekar · 8 years ago
  29. bfc6605 Tegra: fix logic to calculate GICD_ISPENDR register address by Varun Wadekar · 8 years ago
  30. a2c6be6 Tegra: uninit and re-init console across System Suspend by Varun Wadekar · 8 years ago
  31. 28dcc21 Tegra: support for silicon/simulation platforms by Varun Wadekar · 8 years ago
  32. f2aa1be Tegra: per-soc `get_target_pwr_state` handler by Varun Wadekar · 8 years ago
  33. b41a414 Tegra: relocate BL32 image to TZDRAM memory by Varun Wadekar · 8 years ago
  34. d22d4ad Tegra: get BL31 arguments from previous bootloader by Varun Wadekar · 8 years ago
  35. 197a75f Tegra: return BL32 entry point info if it is valid by Varun Wadekar · 8 years ago
  36. 5118b53 Tegra: configure TZDRAM fence during early setup by Varun Wadekar · 8 years ago
  37. d5f578a Tegra: restore TZRAM settings on "System Resume" by Varun Wadekar · 8 years ago
  38. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · 8 years ago
  39. c6c386d Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1 by Varun Wadekar · 8 years ago
  40. dc79930 Tegra: implement FIQ interrupt handler by Varun Wadekar · 9 years ago
  41. b7b4575 Tegra: GIC: enable FIQ interrupt handling by Varun Wadekar · 9 years ago
  42. 2497539 Tegra: implement common handler `plat_get_target_pwr_state()` by Varun Wadekar · 8 years ago
  43. 25e658e Tegra: include platform_def.h to access UART macros by Varun Wadekar · 8 years ago
  44. 2330edd Tegra: allow SiP smc calls from Secure World by Wayne Lin · 8 years ago
  45. 3f0a8ad Tegra: handler for per-soc early setup by Varun Wadekar · 8 years ago
  46. 1ec441e Tegra: relocate code to BL31_BASE during cold boot by Varun Wadekar · 8 years ago
  47. 79fa1a4 Tegra: Disable A57/A53 cache non-temporal hints by Varun Wadekar · 8 years ago
  48. d22429d Tegra: implement pwr_domain_pwr_down_wfi() handler by Varun Wadekar · 8 years ago
  49. d151363 Tegra: memmap BL31's TZDRAM carveout by Varun Wadekar · 8 years ago
  50. e032363 Tegra: increase BL31 image size to 256KB by Varun Wadekar · 8 years ago
  51. 6eec6d6 Tegra: allow individual SoCs to restore their settings by Varun Wadekar · 8 years ago
  52. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · 8 years ago
  53. 6077dce Tegra: enable PSCI extended state ID processing by Varun Wadekar · 8 years ago
  54. 3ce5499 Tegra: define platform power states by Varun Wadekar · 8 years ago
  55. 0dc9181 Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM by Varun Wadekar · 9 years ago
  56. 1dcffa9 Tegra: enable runtime console by Varun Wadekar · 9 years ago
  57. e5caeed Tegra: PM: soc-specific system off handler by Varun Wadekar · 9 years ago
  58. 923d04a Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · 9 years ago
  59. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · 9 years ago
  60. 6bb6246 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · 9 years ago
  61. 7a9a285 Tegra: Memory Controller Driver (v1) by Varun Wadekar · 9 years ago
  62. baf903e Tegra: sanity check members of the "from_bl2" struct by Varun Wadekar · 9 years ago
  63. 39f87d1 Tegra: use ClusterId for calculating core position by Varun Wadekar · 9 years ago
  64. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · 9 years ago
  65. 97f2490 Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform by Varun Wadekar · 9 years ago
  66. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · 9 years ago
  67. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · 9 years ago
  68. a8954fc Replace some memset call by zeromem by Douglas Raillard · 7 years ago
  69. 21362a9 Introduce unified API to zero memory by Douglas Raillard · 8 years ago
  70. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  71. 0fac5af Move BL_COHERENT_RAM_BASE/END defines to common_def.h by Masahiro Yamada · 8 years ago
  72. 1723113 Migrate platform makefile to new console driver location by Soby Mathew · 8 years ago
  73. f6c4108 Include `plat_psci_common.c` from the new location by Soby Mathew · 8 years ago
  74. e82e29c Implement plat_get_syscnt_freq2 on platforms by Antonio Nino Diaz · 8 years ago
  75. 3c0087a Move `plat_get_syscnt_freq()` to arm_common.c by Yatharth Kochar · 8 years ago
  76. 2c7ed5b Dump platform-defined regs in crash reporting by Gerald Lejeune · 9 years ago
  77. cc037c1 Migrate platform ports to the new xlat_tables library by Soby Mathew · 8 years ago
  78. 6fb7880 Merge pull request #508 from soby-mathew/sm/debug_xlat by danh-arm · 8 years ago
  79. c9bac9c Use tf_printf() for debug logs from xlat_tables.c by Soby Mathew · 8 years ago
  80. e7ae6db Disable PL011 UART before configuring it by Juan Castillo · 9 years ago
  81. 33f5c41 Include psci.h from tegra platform header by Yatharth Kochar · 9 years ago
  82. a78bb1b Tegra: remove support for legacy platform APIs by Varun Wadekar · 9 years ago
  83. b2baa89 Tegra: flowctrl: rename tegra_fc_cpu_idle() to tegra_fc_cpu_powerdn() by Varun Wadekar · 9 years ago
  84. 8b82fae Tegra: introduce per-soc system reset handler by Varun Wadekar · 9 years ago
  85. 4489ad1 Tegra: Perform cache maintenance on video carveout memory by Vikram Kanigiri · 9 years ago
  86. 1be2f97 Tegra: fix logic to clear videomem regions by Varun Wadekar · 9 years ago
  87. 4e9c231 Tegra210: wait for 512 timer ticks before retention entry by Varun Wadekar · 9 years ago
  88. 4375028 Merge pull request #360 from vwadekar/tegra-platform-def-v2 by danh-arm · 9 years ago
  89. 88c4d22 Tegra: fix PLATFORM_{CORE_COUNT|NUM_AFFS} macros by Varun Wadekar · 9 years ago
  90. e1eaf8e Tegra: memmap the actual memory available for BL31 by Varun Wadekar · 9 years ago
  91. e98a146 Tegra132: set TZDRAM_BASE to 0xF5C00000 by Varun Wadekar · 9 years ago
  92. c8bfe2e Tegra: retrieve BL32's bootargs from bl32_ep_info by Varun Wadekar · 9 years ago
  93. bc78744 Tegra210: enable WRAP to INCR burst type conversions by Varun Wadekar · 9 years ago
  94. c39b0ba Tegra: modify 'BUILD_PLAT' to point to soc specific build dirs by Varun Wadekar · 9 years ago
  95. 0f3baa0 Tegra: Support for Tegra's T132 platforms by Varun Wadekar · 9 years ago
  96. 254441d Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · 9 years ago
  97. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · 9 years ago
  98. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · 9 years ago
  99. 6cab707 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · 9 years ago
  100. 30d8977 Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · 9 years ago