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filogic
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atf
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e47b703903ae553a919a84aad3647b41768311d6
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bl1
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aarch64
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bl1_entrypoint.S
688fbf7
feat(rme): run BL2 in root world when FEAT_RME is enabled
by Zelalem Aweke
· Fri Jul 09 11:37:10 2021 -0500
c825768
PIE: make call to GDT relocation fixup generalized
by Manish Pandey
· Tue Nov 26 11:34:17 2019 +0000
f41355c
Refactor ARMv8.3 Pointer Authentication support code
by Alexei Fedorov
· Fri Sep 13 14:11:59 2019 +0100
e3887a9
BL1: Enable pointer authentication support
by Antonio Nino Diaz
· Wed Jan 30 20:29:50 2019 +0000
fee8653
Fully initialise essential control registers
by David Cunado
· Thu Apr 13 22:38:29 2017 +0100
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
a65be2f
Add descriptor based image management support in BL1
by Yatharth Kochar
· Fri Oct 09 18:06:13 2015 +0100
b21b02f
Introduce COLD_BOOT_SINGLE_CPU build option
by Sandrine Bailleux
· Fri Oct 30 15:05:17 2015 +0000
449dbd5
Introduce PROGRAMMABLE_RESET_ADDRESS build option
by Sandrine Bailleux
· Tue Jun 02 17:19:43 2015 +0100
acde8b0
Rationalize reset handling code
by Sandrine Bailleux
· Tue May 19 11:54:45 2015 +0100
a877c25
Add support to indicate size and end of assembly functions
by Kévin Petit
· Tue Mar 24 14:03:57 2015 +0000
2ae2043
Remove coherent memory from the BL memory maps
by Soby Mathew
· Thu Jan 08 18:02:44 2015 +0000
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· Thu Aug 14 11:33:56 2014 +0100
ed1744e
Unmask SError interrupt and clear SCR_EL3.EA bit
by Achin Gupta
· Mon Aug 04 23:13:10 2014 +0100
9f09835
Simplify management of SCTLR_EL3 and SCTLR_EL1
by Achin Gupta
· Fri Jul 18 18:38:28 2014 +0100
f4a9709
Remove coherent stack usage from the cold boot path
by Achin Gupta
· Wed Jun 25 19:26:22 2014 +0100
cf79bf5
Simplify entry point information generation code on FVP
by Vikram Kanigiri
· Mon Jun 02 14:59:00 2014 +0100
9637745
Add support for BL3-1 as a reset vector
by Vikram Kanigiri
· Thu Apr 24 11:02:16 2014 +0100
1644425
Merge pull request #62 from athoelke/set-little-endian-v2
by danh-arm
· Thu May 08 12:01:24 2014 +0100
f977ed8
Access system registers directly in assembler
by Andrew Thoelke
· Mon Apr 28 12:32:02 2014 +0100
42e75a7
Correct usage of data and instruction barriers
by Andrew Thoelke
· Mon Apr 28 12:28:39 2014 +0100
f994ffb
Set processor endianness immediately after RESET
by Andrew Thoelke
· Thu Apr 24 15:33:24 2014 +0100
38bde41
Place assembler functions in separate sections
by Andrew Thoelke
· Tue Mar 18 13:46:55 2014 +0000
4d05275
Separate out BL2, BL3-1 and BL3-2 early exception vectors from BL1
by Sandrine Bailleux
· Mon Mar 24 10:24:08 2014 +0000
2a30a75
Specify image entry in linker script
by Jeenu Viswambharan
· Tue Mar 11 11:06:45 2014 +0000
3a4cae0
Change comments in assembler files to help ctags
by Jeenu Viswambharan
· Thu Jan 16 17:30:39 2014 +0000
4f60368
Do not trap access to floating point registers
by Harry Liebel
· Tue Jan 14 18:11:48 2014 +0000
e83b0ca
Update year in copyright text to 2014
by Dan Handley
· Tue Jan 14 18:17:09 2014 +0000
ab2d31e
Enable third party contributions
by Dan Handley
· Mon Dec 02 19:25:12 2013 +0000
65f546a
Properly initialise the C runtime environment
by Sandrine Bailleux
· Thu Nov 28 09:43:06 2013 +0000
8d69a03
Various improvements/cleanups on the linker scripts
by Sandrine Bailleux
· Wed Nov 27 09:38:52 2013 +0000
c10bd2c
Move generic architectural setup out of blx_plat_arch_setup().
by Sandrine Bailleux
· Tue Nov 12 16:41:16 2013 +0000
4f6ad66
ARMv8 Trusted Firmware release v0.2
by Achin Gupta
· Fri Oct 25 09:08:21 2013 +0100