1. e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · Thu Sep 10 11:39:36 2015 +0100
  2. 3ce4e88 Add macros for retention control in Cortex-A53/A57 by Varun Wadekar · Fri Aug 21 15:52:51 2015 +0530
  3. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · Wed Jul 29 20:55:31 2015 +0800
  4. a310c4f Add mmio utility functions by developer · Fri Jul 31 13:48:22 2015 +0800
  5. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · Tue Jul 14 17:11:20 2015 +0530
  6. ea59668 Add header guards to asm macro files by Dan Handley · Wed Apr 01 17:34:24 2015 +0100
  7. 0cdebbd Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · Mon Mar 30 17:15:16 2015 +0100
  8. 05cbb00 Merge pull request #277 from soby-mathew/sm/coh_lock_opt by danh-arm · Wed Apr 01 11:39:56 2015 +0100
  9. 2eb68ca Merge pull request #280 from vwadekar/tlkd-fixed-v3 by danh-arm · Wed Apr 01 11:36:08 2015 +0100
  10. 97625e3 Translate secure/non-secure virtual addresses by Varun Wadekar · Fri Mar 13 14:59:03 2015 +0530
  11. 156280c Remove the `owner` field in bakery_lock_t data structure by Soby Mathew · Fri Feb 20 16:04:17 2015 +0000
  12. a0a897d Optimize the bakery lock structure for coherent memory by Soby Mathew · Thu Feb 19 16:23:51 2015 +0000
  13. 632432b Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · Thu Mar 19 19:33:06 2015 +0000
  14. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · Tue Feb 17 11:50:28 2015 +0000
  15. 4e97e54 Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · Thu Feb 26 15:25:58 2015 +0000
  16. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · Thu Nov 20 18:09:41 2014 +0000
  17. 26fb90e Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · Tue Jan 06 21:36:55 2015 +0000
  18. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · Thu Jan 08 18:02:19 2015 +0000
  19. ed99566 Add macros for domain specific barriers. by Soby Mathew · Tue Dec 30 16:11:42 2014 +0000
  20. 30c231b Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · Wed Jan 07 16:36:11 2015 +0000
  21. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · Thu Dec 04 14:14:12 2014 +0000
  22. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · Mon Sep 22 12:11:36 2014 +0100
  23. 070a3e0 Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · Fri Oct 10 12:13:48 2014 +0100
  24. b08bc04 Create BL stage specific translation tables by Soby Mathew · Wed Sep 03 17:48:44 2014 +0100
  25. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · Thu Sep 04 10:23:27 2014 +0200
  26. feddfcf Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · Fri Aug 29 14:41:58 2014 +0100
  27. 798140d Juno: Implement initial platform port by Sandrine Bailleux · Thu Jul 17 16:06:39 2014 +0100
  28. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · Thu Aug 14 16:19:29 2014 +0100
  29. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · Thu Aug 14 13:36:41 2014 +0100
  30. 8e2f287 Add CPU specific power management operations by Soby Mathew · Thu Aug 14 12:49:05 2014 +0100
  31. c704cbc Introduce framework for CPU specific operations by Soby Mathew · Thu Aug 14 11:33:56 2014 +0100
  32. 7b83c44 Move IO storage source to drivers directory by Dan Handley · Tue Aug 12 14:20:28 2014 +0100
  33. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  34. e998254 Make enablement of the MMU more flexible by Achin Gupta · Thu Jun 26 08:59:07 2014 +0100
  35. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · Fri Jun 27 16:56:30 2014 -0700
  36. 22129f5 Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · Thu Jun 26 23:02:28 2014 +0100
  37. 3c74a44 Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · Tue Jun 24 16:48:31 2014 +0100
  38. 42970b0 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · Tue Jun 24 16:44:12 2014 +0100
  39. af9dd82 Inline the mmio accessor functions by Andrew Thoelke · Tue Jun 24 14:18:35 2014 +0100
  40. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · Fri Jun 13 17:05:10 2014 +0100
  41. 958cc02 Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · Mon Jun 09 12:54:15 2014 +0100
  42. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · Wed Jun 04 21:10:52 2014 +0100
  43. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · Mon Jun 16 12:41:48 2014 +0100
  44. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · Mon Jun 02 15:44:43 2014 +0100
  45. 1359236 Enable mapping higher physical address by Lin Ma · Mon Jun 02 11:45:36 2014 -0700
  46. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  47. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  48. a17fefa Remove extern keyword from function declarations by Dan Handley · Wed May 14 12:38:32 2014 +0100
  49. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 12:00:17 2014 +0100
  50. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · Sun May 04 18:38:28 2014 +0100
  51. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · Tue May 13 14:42:08 2014 +0100
  52. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · Mon Apr 07 15:28:55 2014 +0100
  53. 25232af Introduce IS_IN_ELX() macros by Sandrine Bailleux · Fri May 09 11:23:11 2014 +0100
  54. 5879ffd Remove unused or invalid asm helper functions by Andrew Thoelke · Mon Apr 28 12:33:52 2014 +0100
  55. 438c63a Replace disable_mmu with assembler version by Andrew Thoelke · Mon Apr 28 12:06:18 2014 +0100
  56. a4cb68e Remove variables from .data section by Dan Handley · Wed Apr 23 13:47:06 2014 +0100
  57. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  58. e2712bc Always use named structs in header files by Dan Handley · Thu Apr 10 15:37:22 2014 +0100
  59. bcd60ba Separate BL functions out of arch.h by Dan Handley · Thu Apr 17 18:53:42 2014 +0100
  60. f3c8f32 Separate out CASSERT macro into own header by Dan Handley · Thu Apr 17 17:29:58 2014 +0100
  61. a70615f Move include and source files to logical locations by Dan Handley · Wed Apr 09 12:48:25 2014 +0100