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git01.mediatek.com / filogic / atf / e1ce845f159ee54168312c3ea8650481f3fa4c94 / plat / xilinx / versal_net / include / plat_private.h
  1. 2eb2279 fix(versal-net): setup counter frequency by Prasad Kummari · Wed Dec 20 16:15:03 2023 +0530
  2. 0b37714 refactor(xilinx): rename platform function to generic name by Prasad Kummari · Thu Oct 26 16:32:26 2023 +0530
  3. e7e8f86 refactor(xilinx): create generic function for clock retrieval by Prasad Kummari · Wed Oct 04 10:20:30 2023 +0530
  4. 2a47faa style(xilinx): replace ARM by Arm in copyrights by Michal Simek · Fri Apr 14 08:43:51 2023 +0200
  5. 5b672d9 refactor(xilinx): move enum to common place by Jay Buddhabhatti · Thu Mar 23 05:02:50 2023 -0700
  6. 5b9f391 refactor(xilinx): move pm_defs.h to common place by Jay Buddhabhatti · Thu Feb 02 22:34:03 2023 -0800
  7. c6daff0 feat(versal-net): add support for platform management by Jay Buddhabhatti · Mon Sep 05 02:56:32 2022 -0700
  8. 9179436 feat(versal-net): add support for Xilinx Versal NET platform by Michal Simek · Wed Aug 31 16:45:14 2022 +0200