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git01.mediatek.com / filogic / atf / e18cf33418501c62a5d0dba0ff5dba69affb598d / include / drivers / nxp / clk / s32cc
  1. e18cf33 feat(nxp-clk): set rate for PLL objects by Ghennadi Procopciuc · Wed Jun 12 11:55:32 2024 +0300
  2. 8384d18 feat(nxp-clk): add MC_CGM clock objects by Ghennadi Procopciuc · Wed Jun 12 10:53:06 2024 +0300
  3. aa45fa9 feat(nxp-clk): add set_parent callback by Ghennadi Procopciuc · Wed Jun 12 10:02:07 2024 +0300
  4. 7277b97 feat(nxp-clk): add clock objects for ARM PLL by Ghennadi Procopciuc · Wed Jun 12 09:53:18 2024 +0300
  5. f648e5d feat(s32g274a): enable BL2 early clocks by Ghennadi Procopciuc · Wed Jun 12 09:07:16 2024 +0300
  6. 0d52577 feat(nxp-clk): implement set_rate for oscillators by Ghennadi Procopciuc · Wed Jun 12 08:09:19 2024 +0300
  7. ecc98d2 feat(nxp-clk): add oscillator clock objects by Ghennadi Procopciuc · Wed Jun 12 07:38:52 2024 +0300
  8. 48cb761 feat(nxp-clk): add minimal set of S32CC clock ids by Ghennadi Procopciuc · Tue Jun 11 18:52:17 2024 +0300