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git01.mediatek.com / filogic / atf / e164e26a5838ea7cec57a02a8bcf5bad1ad5874a / plat / rockchip / rk3399 / include / shared
  1. 6843ae9 rockchip: Update BL31_BASE to 0x40000 by Kever Yang · Thu Sep 19 10:37:36 2019 +0800
  2. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  3. 00960ba rockchip/rk3399: Split M0 binary into two by Lin Huang · Fri Apr 20 15:55:21 2018 +0800
  4. 2c60b5f rockchip/rk3399: save and restore pd_alive register by Lin Huang · Thu May 18 18:04:25 2017 +0800
  5. 88dd123 rockchip/rk3399: enable PMU_PERILP_PD_EN bit when suspend by Lin Huang · Tue May 16 16:40:46 2017 +0800
  6. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  7. c39aacd rockchip: rk3399: sperate the BL31 parameters for sharing by Xing Zheng · Thu Dec 22 18:34:14 2016 +0800
  8. b4bcc1d rockchip: Clean up header and referenced files by Xing Zheng · Fri Feb 24 16:26:11 2017 +0800
  9. 93280b7 rk3399: dram: use PMU M0 to do ddr frequency scaling by Xing Zheng · Wed Oct 26 21:25:26 2016 +0800