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filogic
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atf
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e0cb1898f74e3aea5752ea00f86bcc494ceb1794
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plat
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nvidia
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tegra
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soc
/
t186
/
plat_secondary.c
17ad11a
Tegra186: system resume from TZSRAM memory
by Varun Wadekar
· 6 years ago
f3d9b84
Tegra186: disable PROGRAMMABLE_RESET_ADDRESS
by Varun Wadekar
· 6 years ago
186485e
Tegra: rename secure scratch register macros
by Steven Kao
· 7 years ago
8304fc8
Tegra186: secondary: fix MISRA violations for Rules 8.6, 11.1
by Varun Wadekar
· 7 years ago
5a4ce00
Tegra186: fix defects flagged by MISRA scan
by Anthony Zhou
· 7 years ago
faad346
Tegra186: secondary: fix MISRA defects
by Anthony Zhou
· 8 years ago
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· 6 years ago
4b32e62
libc: Fix all includes in codebase
by Antonio Nino Diaz
· 6 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 8 years ago
d007f76
Tegra186: Update API for reset vector ARI
by Krishna Sitaraman
· 8 years ago
93bed2a
Tegra186: save/restore BL31 context to/from TZDRAM
by Varun Wadekar
· 9 years ago
abd153c
Tegra186: power on/off secondary CPUs
by Varun Wadekar
· 9 years ago
921b906
Tegra186: platform support for Tegra "T186" SoC
by Varun Wadekar
· 9 years ago