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git01.mediatek.com / filogic / atf / e08d7b1a2f6876e095cf6c12e0acdf6ca5008b10 / bl1 / aarch32 / bl1_exceptions.S
  1. adfa8b0 bl1-smc-handler: Ensure the lower-order 16 bits of SPSR are programmed by Bryan O'Donoghue · Tue Mar 12 12:09:51 2019 +0000
  2. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  3. 128de8d xlat v2: Support the EL2 translation regime by Antonio Nino Diaz · Tue Aug 07 19:59:49 2018 +0100
  4. 3c817f4 Rename 'smcc' to 'smccc' by Antonio Nino Diaz · Wed Mar 21 10:49:27 2018 +0000
  5. 094041d aarch32: use lr as bl32 boot argument on aarch32 only systems by Etienne Carriere · Fri Feb 02 13:16:18 2018 +0100
  6. cdd03cb AArch32: Add `TRUSTED_BOARD_BOOT` support by dp-arm · Wed Feb 15 11:07:55 2017 +0000
  7. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  8. 5d36121 AArch32: Add generic changes in BL1 by Yatharth Kochar · Tue Jun 28 17:07:09 2016 +0100