1. 33bfc5e build: always prefix section names with `.` by Chris Kay · 1 year, 9 months ago
  2. caa2e05 fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 by Bipin Ravi · 2 years, 9 months ago
  3. f144157 Pass more -D options to BL*_CPPFLAGS instead of BL*_CFLAGS by Masahiro Yamada · 4 years, 7 months ago
  4. 94accd3 Neoverse N1 Errata Workaround 1542419 by laurenw-arm · 5 years ago
  5. a904487 Update macro to check need for CVE-2017-5715 mitigation by Antonio Nino Diaz · 6 years ago
  6. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  7. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
  8. 0980dce Make errata reporting mandatory for CPU files by Soby Mathew · 6 years ago
  9. b561536 plat/arm: relocate the jump_if_cpu_midr macro. by Deepak Pandey · 6 years ago
  10. 26b8589 Remove integrity check in declare_cpu_ops_base by Roberto Vargas · 7 years ago
  11. 67762d9 Remove .struct directive by Roberto Vargas · 7 years ago
  12. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  13. efb1f33 Check presence of fix for errata 843419 in Cortex-A53 by Jonathan Wright · 7 years ago
  14. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 7 years ago
  15. 780cc95 Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  16. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 7 years ago
  17. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  18. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  19. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  20. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  21. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  22. ea59668 Add header guards to asm macro files by Dan Handley · 10 years ago
  23. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  24. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  25. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago[Renamed (89%) from include/lib/aarch64/cpu_macros.S]
  26. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago[Copied (63%) from lib/aarch64/cpu_helpers.S]
  27. c61399b Merge pull request #191 from danh-arm/jc/tf-issues/218 by danh-arm · 10 years ago