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git01.mediatek.com / filogic / atf / decc8ddd0cd12cac9763d35ba0c2746fb78e306e / plat / intel / soc / common / socfpga_sip_svc.c
  1. 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · 4 years, 11 months ago
  2. 0c6dae2 intel: FPGA config_isdone() status query by Hadi Asyrafi · 5 years ago
  3. cee6aa9 intel: Change all global sip function to static by Hadi Asyrafi · 5 years ago
  4. 6794230 intel: Enable SiP SMC secure register access by Hadi Asyrafi · 5 years ago
  5. f3a7c14 intel: Fix SMC SIP service by Hadi Asyrafi · 5 years ago
  6. 9dfc047 intel: Introduce mailbox response length handling by Hadi Asyrafi · 5 years ago
  7. 500b232 plat: intel: Fix FPGA manager on reconfiguration by Tien Hock, Loh · 5 years ago
  8. c516816 intel: Modify mailbox's get_config_status by Hadi Asyrafi · 5 years ago
  9. ab1132f intel: Create SiP service header file by Hadi Asyrafi · 5 years ago
  10. 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · 5 years ago[Renamed (99%) from plat/intel/soc/agilex/socfpga_sip_svc.c]
  11. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · 5 years ago
  12. 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · 5 years ago