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git01.mediatek.com / filogic / atf / deb1a367110015d99970db3301ced46848e74524 / include / common
  1. b72de19 Merge pull request #1356 from robertovargas-arm/misra-changes by Dimitris Papastamos · 7 years ago
  2. be126ed Fix MISRA rule 8.3 Part 4 by Roberto Vargas · 7 years ago
  3. 54f5d67 fix instruction address range limitation by Jiafei Pan · 7 years ago
  4. 43a7bf4 Add support for BL2 in XIP memory by Jiafei Pan · 7 years ago
  5. 5cc3bc8 Clean usage of void pointers to access symbols by Joel Hutton · 7 years ago
  6. 3c817f4 Rename 'smcc' to 'smccc' by Antonio Nino Diaz · 7 years ago
  7. 2ca18d9 Fix MISRA rule 8.4 Part 1 by Roberto Vargas · 7 years ago
  8. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · 7 years ago
  9. 777dd43 Fix MISRA rule 8.3 in common code by Roberto Vargas · 7 years ago
  10. cc36484 Dynamic cfg: MISRA fixes by Soby Mathew · 7 years ago
  11. 96a1c6b ARM Platforms: Load HW_CONFIG in BL2 by Soby Mathew · 7 years ago
  12. b9fccca Dynamic cfg: Introduce fdt wrappers by Soby Mathew · 7 years ago
  13. 40eb4b6 Add dynamic config image IDs by Soby Mathew · 7 years ago
  14. 0bdfef0 Dynamic cfg: Add HW and TB_FW configs to CoT by Soby Mathew · 7 years ago
  15. 7814a95 Merge pull request #1173 from etienne-lms/armv7-qemu by davidcunado-arm · 7 years ago
  16. 094041d aarch32: use lr as bl32 boot argument on aarch32 only systems by Etienne Carriere · 7 years ago
  17. 18f65db image_decompress: add APIs for decompressing images by Masahiro Yamada · 7 years ago
  18. 04285cf Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · 7 years ago
  19. d79d40d Merge pull request #1193 from jwerner-chromium/JW_coreboot by davidcunado-arm · 7 years ago
  20. b5d1f8e Merge pull request #1200 from robertovargas-arm/bl2-el3 by davidcunado-arm · 7 years ago
  21. 0a4cded sp_min: Implement workaround for CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  22. e4e342d Mark functions defined in assembly files by Roberto Vargas · 7 years ago
  23. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 7 years ago
  24. 446f7f1 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  25. 94f8907 Add new function-pointer-based console API by Julius Werner · 7 years ago
  26. 4213a3f Merge pull request #1178 from davidcunado-arm/dc/enable_sve by davidcunado-arm · 7 years ago
  27. 7c8af06 Unify cache flush code path after image load by Soby Mathew · 7 years ago
  28. ce88eee Enable SVE for Non-secure world by David Cunado · 7 years ago
  29. 42ef554 Merge pull request #1145 from etienne-lms/rfc-armv7-2 by davidcunado-arm · 7 years ago
  30. 5bdbb47 Refactor Statistical Profiling Extensions implementation by Dimitris Papastamos · 7 years ago
  31. c41f206 SPM: Introduce Secure Partition Manager by Antonio Nino Diaz · 7 years ago
  32. 4cce835 ARMv7 may not support Virtualization Extensions by Etienne Carriere · 7 years ago
  33. 863858b ARMv7 does not support SDCR by Etienne Carriere · 7 years ago
  34. 70b1c2f ARMv7 does not support STL instruction by Etienne Carriere · 7 years ago
  35. aeb267c GIC: Allow specifying interrupt properties by Jeenu Viswambharan · 7 years ago
  36. aaf15f5 Implement log framework by Soby Mathew · 7 years ago
  37. f583a06 Introduce tf_vprintf() and tf_string_print() by Soby Mathew · 7 years ago
  38. e94b06d Merge pull request #1078 from douglas-raillard-arm/dr/add_cfi_vector_entry by davidcunado-arm · 7 years ago
  39. 878f03c Merge pull request #1019 from etienne-lms/log-size by davidcunado-arm · 7 years ago
  40. 97ad6ce cpu log buffer size depends on cache line size by Etienne Carriere · 7 years ago
  41. efa50b5 Add CFI debug info to vector entries by Douglas Raillard · 7 years ago
  42. be1d3ef asm_macros: set the default assembly code alignment to 4 byte by Masahiro Yamada · 7 years ago
  43. b4c75e9 Add new alignment parameter to func assembler macro by Julius Werner · 7 years ago
  44. 8072678 Support Trusted OS firmware extra images in TF tools by Summer Qin · 8 years ago
  45. ee3457b aarch64: Enable Statistical Profiling Extensions for lower ELs by dp-arm · 7 years ago
  46. fee8653 Fully initialise essential control registers by David Cunado · 8 years ago
  47. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
  48. 34e7843 Merge pull request #949 from antonio-nino-diaz-arm/an/printf-memory by davidcunado-arm · 7 years ago
  49. 9c107fa Introduce `tf_snprintf` by Antonio Nino Diaz · 7 years ago
  50. e3a2b31 fip: move headers shared between TF and fiptool to include/tools_share by Masahiro Yamada · 8 years ago
  51. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  52. 7d99b6c Merge branch 'integration' into tf_issue_461 by Scott Branden · 8 years ago
  53. bf404c0 Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · 8 years ago
  54. bf360df Merge pull request #910 from dp-arm/dp/AArch32-juno-port by davidcunado-arm · 8 years ago
  55. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago
  56. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 8 years ago
  57. 18e6004 Merge pull request #886 from dp-arm/dp/stack-protector by davidcunado-arm · 8 years ago
  58. 306593d Add support for GCC stack protection by Douglas Raillard · 8 years ago
  59. b911cc7 Re-factor header files for easier PSCI library integration by Soby Mathew · 8 years ago
  60. 88de358 Merge pull request #841 from dp-arm/dp/debug-regs by danh-arm · 8 years ago
  61. 595d0d5 Disable secure self-hosted debug via MDCR_EL3/SDCR by dp-arm · 8 years ago
  62. 21362a9 Introduce unified API to zero memory by Douglas Raillard · 8 years ago
  63. 54ec86a Allow spin locks to be defined from assembly by Jeenu Viswambharan · 8 years ago
  64. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  65. 2b7d7ae Merge pull request #791 from jeenu-arm/asm-assert-32 by danh-arm · 8 years ago
  66. b0e529b Export is_mem_free() function by Sandrine Bailleux · 8 years ago
  67. ff640c4 AArch32: Print ASM_ASSERT and panic messages by Jeenu Viswambharan · 8 years ago
  68. 975d08c Merge pull request #774 from jeenu-arm/no-return-macro by danh-arm · 8 years ago
  69. 68aef10 Define and use no_ret macro where no return is expected by Jeenu Viswambharan · 8 years ago
  70. c14b08e Reset EL2 and EL3 configurable controls by David Cunado · 8 years ago
  71. 1c0e208 Add CFI debug frame information for ASM functions by Douglas Raillard · 8 years ago
  72. 5f55e28 Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR by David Cunado · 8 years ago
  73. c44c5af AArch32: Add `memcpy4` function in assembly by Yatharth Kochar · 8 years ago
  74. 89256b8 PSCI: Introduce PSCI Library argument structure by Soby Mathew · 8 years ago
  75. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  76. 3345a8d Add new version of image loading. by Yatharth Kochar · 8 years ago
  77. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 9 years ago
  78. a9482df AArch32: Add API to invoke runtime service handler by Soby Mathew · 9 years ago
  79. d29f67b AArch32: Add assembly helpers by Soby Mathew · 9 years ago
  80. b9ff2fd Rearrange assembly helper macros by Soby Mathew · 8 years ago
  81. d019487 Introduce PSCI Library Interface by Soby Mathew · 9 years ago
  82. 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 9 years ago
  83. 24ab34f Fix coding guideline warnings by Soby Mathew · 9 years ago
  84. a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · 8 years ago
  85. ba39fc6 Merge pull request #662 from sandrine-bailleux-arm/sb/rodata-xn by danh-arm · 8 years ago
  86. f91f144 Introduce SEPARATE_CODE_AND_RODATA build flag by Sandrine Bailleux · 8 years ago
  87. 7659a26 Introduce utils.h header file by Sandrine Bailleux · 8 years ago
  88. bfdbecf Derive stack alignment from CACHE_WRITEBACK_GRANULE by Soby Mathew · 8 years ago
  89. a913dee Merge pull request #636 from soby-mathew/sm/cpu_ctx_rem_aarch32_regs by danh-arm · 8 years ago
  90. d75d2ba Build option to include AArch32 registers in cpu context by Soby Mathew · 8 years ago
  91. 618ba99 Fill exception vectors with zero bytes by Sandrine Bailleux · 8 years ago
  92. 9e6ad6c Introduce some helper macros for exception vectors by Sandrine Bailleux · 8 years ago
  93. 37a12df Fix build error with optimizations disabled (-O0) by Sandrine Bailleux · 9 years ago
  94. 074e05a Enable SCR_EL3.SIF bit by Soby Mathew · 9 years ago
  95. 632d6df Enable asynchronous abort exceptions during boot by Gerald Lejeune · 9 years ago
  96. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · 9 years ago
  97. 1f21bcf Remove all non-configurable dead loops by Antonio Nino Diaz · 9 years ago
  98. 0165c11 Merge pull request #541 from antonio-nino-diaz-arm/an/secondary-cpu-init by danh-arm · 9 years ago
  99. 4357b41 Initialize secondary CPUs during cold boot by Antonio Nino Diaz · 9 years ago
  100. f11b29a Fix the inconsistencies in bl1_tbbr_image_descs[] by Yatharth Kochar · 9 years ago