1. 95fb1aa refactor(el3-runtime): add prepare_el3_entry func by Daniel Boulby · Wed Jan 19 11:20:05 2022 +0000
  2. 688fbf7 feat(rme): run BL2 in root world when FEAT_RME is enabled by Zelalem Aweke · Fri Jul 09 11:37:10 2021 -0500
  3. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · Tue Aug 04 16:18:52 2020 -0500
  4. f94399a Move static vars into functions in bl1 by Jimmy Brisson · Tue Aug 04 16:27:51 2020 -0500
  5. a5c6636 Fix MISRA C issues in BL1/BL2/BL31 by John Powell · Fri Mar 20 14:21:05 2020 -0500
  6. e8dadb1 coverity: Fix MISRA null pointer violations by Zelalem · Wed Feb 05 14:12:39 2020 -0600
  7. 0f7e601 Prevent speculative execution past ERET by Anthony Steinhauser · Tue Jan 07 15:44:06 2020 -0800
  8. c825768 PIE: make call to GDT relocation fixup generalized by Manish Pandey · Tue Nov 26 11:34:17 2019 +0000
  9. 3dd9f2b TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U by Alexei Fedorov · Tue Oct 01 13:58:23 2019 +0100
  10. c3a1836 Merge changes from topic "db/unsigned_long" into integration by Sandrine Bailleux · Wed Sep 18 14:30:09 2019 +0000
  11. 64e557c Unsigned long should not be used as per coding guidelines by Deepika Bhavnani · Tue Sep 03 21:51:09 2019 +0300
  12. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  13. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  14. a533ae7 Refactor SPSR initialisation code by John Tsichritzis · Mon Jul 01 14:27:33 2019 +0100
  15. e3887a9 BL1: Enable pointer authentication support by Antonio Nino Diaz · Wed Jan 30 20:29:50 2019 +0000
  16. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  17. 864ca6f context_mgmt: Fix MISRA defects by Antonio Nino Diaz · Wed Oct 31 15:25:35 2018 +0000
  18. 95f30ab Add end_vector_entry assembler macro by Roberto Vargas · Tue Apr 17 11:31:43 2018 +0100
  19. 3c817f4 Rename 'smcc' to 'smccc' by Antonio Nino Diaz · Wed Mar 21 10:49:27 2018 +0000
  20. eb24dff Ensure the correct execution of TLBI instructions by Antonio Nino Diaz · Mon Feb 19 13:53:48 2018 +0000
  21. 9930501 Fix order of #includes by Isla Mitchell · Tue Jul 11 14:54:08 2017 +0100
  22. 09bb548 Merge pull request #978 from etienne-lms/minor-build by danh-arm · Wed Jun 28 13:46:19 2017 +0100
  23. ba7c3d5 bl1: include bl1_private.h in aarch* files by Etienne Carriere · Wed Jun 07 16:41:50 2017 +0200
  24. fee8653 Fully initialise essential control registers by David Cunado · Thu Apr 13 22:38:29 2017 +0100
  25. 6715485 Merge pull request #927 from jeenu-arm/state-switch by davidcunado-arm · Thu May 11 16:04:52 2017 +0100
  26. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  27. 2a9b882 Add macro to check whether the CPU implements an EL by Jeenu Viswambharan · Tue Feb 21 14:40:44 2017 +0000
  28. 68aef10 Define and use no_ret macro where no return is expected by Jeenu Viswambharan · Wed Nov 30 15:21:11 2016 +0000
  29. 5d36121 AArch32: Add generic changes in BL1 by Yatharth Kochar · Tue Jun 28 17:07:09 2016 +0100
  30. 47b0fe3 Remove looping around `plat_report_exception` by Yatharth Kochar · Wed Aug 17 11:10:16 2016 +0100
  31. 9e6ad6c Introduce some helper macros for exception vectors by Sandrine Bailleux · Tue May 24 16:56:03 2016 +0100
  32. 632d6df Enable asynchronous abort exceptions during boot by Gerald Lejeune · Tue Mar 22 09:29:23 2016 +0100
  33. 71c9a5e FWU: Add Generic Firmware Update framework support in BL1 by Yatharth Kochar · Sat Oct 10 19:06:53 2015 +0100
  34. a65be2f Add descriptor based image management support in BL1 by Yatharth Kochar · Fri Oct 09 18:06:13 2015 +0100
  35. 6c0566c Move context management code to common location by Yatharth Kochar · Fri Oct 02 17:56:48 2015 +0100
  36. b21b02f Introduce COLD_BOOT_SINGLE_CPU build option by Sandrine Bailleux · Fri Oct 30 15:05:17 2015 +0000
  37. 87322b3 Pass the entry point info to bl1_plat_prepare_exit() by Sandrine Bailleux · Tue Nov 10 15:01:57 2015 +0000
  38. b7e97c4 Introduce SPIN_ON_BL1_EXIT build flag by Sandrine Bailleux · Tue Nov 10 10:01:19 2015 +0000
  39. 33c95cc Improve display_boot_progress() function by Sandrine Bailleux · Tue Oct 27 15:52:33 2015 +0000
  40. d1413b2 Add optional bl1_plat_prepare_exit() API by Juan Castillo · Mon Oct 05 16:59:38 2015 +0100
  41. 1626946 Break down BL1 AArch64 synchronous exception handler by Sandrine Bailleux · Tue Sep 29 13:38:20 2015 +0100
  42. 449dbd5 Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · Tue Jun 02 17:19:43 2015 +0100
  43. acde8b0 Rationalize reset handling code by Sandrine Bailleux · Tue May 19 11:54:45 2015 +0100
  44. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  45. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · Thu Jan 08 18:02:44 2015 +0000
  46. 046cd3f Miscellaneous documentation fixes by Sandrine Bailleux · Wed Aug 06 11:27:23 2014 +0100
  47. c704cbc Introduce framework for CPU specific operations by Soby Mathew · Thu Aug 14 11:33:56 2014 +0100
  48. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · Mon Aug 04 23:13:10 2014 +0100
  49. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  50. f4a9709 Remove coherent stack usage from the cold boot path by Achin Gupta · Wed Jun 25 19:26:22 2014 +0100
  51. f268c72 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · Fri Jun 27 14:10:04 2014 +0100
  52. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · Fri Jun 13 17:05:10 2014 +0100
  53. cf79bf5 Simplify entry point information generation code on FVP by Vikram Kanigiri · Mon Jun 02 14:59:00 2014 +0100
  54. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · Wed Jun 04 21:10:52 2014 +0100
  55. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · Thu Apr 24 11:02:16 2014 +0100
  56. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · Tue Apr 15 18:08:08 2014 +0100
  57. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · Thu May 15 18:27:15 2014 +0100
  58. 1644425 Merge pull request #62 from athoelke/set-little-endian-v2 by danh-arm · Thu May 08 12:01:24 2014 +0100
  59. f977ed8 Access system registers directly in assembler by Andrew Thoelke · Mon Apr 28 12:32:02 2014 +0100
  60. 438c63a Replace disable_mmu with assembler version by Andrew Thoelke · Mon Apr 28 12:06:18 2014 +0100
  61. 42e75a7 Correct usage of data and instruction barriers by Andrew Thoelke · Mon Apr 28 12:28:39 2014 +0100
  62. f994ffb Set processor endianness immediately after RESET by Andrew Thoelke · Thu Apr 24 15:33:24 2014 +0100
  63. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  64. a686542 Merge pull request #36 from athoelke/at/gc-sections-80 by danh-arm · Tue Apr 15 09:39:47 2014 +0100
  65. 3fa9847 Define frequency of system counter in platform code by Sandrine Bailleux · Mon Mar 31 11:25:18 2014 +0100
  66. 74c1a2a Revert "Move architecture timer setup to platform-specific code" by Sandrine Bailleux · Mon Mar 31 10:44:09 2014 +0100
  67. 38bde41 Place assembler functions in separate sections by Andrew Thoelke · Tue Mar 18 13:46:55 2014 +0000
  68. 4d05275 Separate out BL2, BL3-1 and BL3-2 early exception vectors from BL1 by Sandrine Bailleux · Mon Mar 24 10:24:08 2014 +0000
  69. 78a6e0c Remove partially qualified asm helper functions by Vikram Kanigiri · Tue Mar 11 17:41:00 2014 +0000
  70. 2a30a75 Specify image entry in linker script by Jeenu Viswambharan · Tue Mar 11 11:06:45 2014 +0000
  71. 5741894 Move architecture timer setup to platform-specific code by Jeenu Viswambharan · Tue Jan 07 10:21:18 2014 +0000
  72. a7934d6 Add exception vector guards by Jeenu Viswambharan · Fri Feb 07 15:53:18 2014 +0000
  73. b739f22 Setup VBAR_EL3 incrementally by Achin Gupta · Sat Jan 18 16:50:09 2014 +0000
  74. 65f0730 Fix spilled-over BL1 exception vector by Jeenu Viswambharan · Fri Feb 07 15:50:57 2014 +0000
  75. 5443f2b remove empty definition of display_boot_progress() by Achin Gupta · Sat Jan 18 16:26:30 2014 +0000
  76. 3a4cae0 Change comments in assembler files to help ctags by Jeenu Viswambharan · Thu Jan 16 17:30:39 2014 +0000
  77. 4f60368 Do not trap access to floating point registers by Harry Liebel · Tue Jan 14 18:11:48 2014 +0000
  78. e83b0ca Update year in copyright text to 2014 by Dan Handley · Tue Jan 14 18:17:09 2014 +0000
  79. ab2d31e Enable third party contributions by Dan Handley · Mon Dec 02 19:25:12 2013 +0000
  80. 65f546a Properly initialise the C runtime environment by Sandrine Bailleux · Thu Nov 28 09:43:06 2013 +0000
  81. 8d69a03 Various improvements/cleanups on the linker scripts by Sandrine Bailleux · Wed Nov 27 09:38:52 2013 +0000
  82. 3738274 Unmask SError and Debug exceptions. by Sandrine Bailleux · Mon Nov 18 17:26:59 2013 +0000
  83. c10bd2c Move generic architectural setup out of blx_plat_arch_setup(). by Sandrine Bailleux · Tue Nov 12 16:41:16 2013 +0000
  84. 4f6ad66 ARMv8 Trusted Firmware release v0.2 by Achin Gupta · Fri Oct 25 09:08:21 2013 +0100