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git01.mediatek.com / filogic / atf / dcc9ef8202067386adf087eb938a4c66dce86d88 / drivers / staging / renesas / rcar / ddr / ddr_a / ddr_init_v3m.c
  1. dcc9ef8 rcar_get3: drivers: ddr: Partly unify register macros between DDR A and B by Marek Vasut · 5 years ago
  2. 3aa0d44 rcar_gen3: drivers: ddr-a: Fix V3M DDR init coding style by Marek Vasut · 5 years ago
  3. b9e78d4 rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32() by Marek Vasut · 5 years ago
  4. 291bbfe rcar_gen3: drivers: ddr-a: Unify register definitions by Marek Vasut · 5 years ago
  5. a75f826 rcar_gen3: drivers: ddr: Replace BITn with BIT(n) macro by Marek Vasut · 5 years ago
  6. f218414 rcar_gen3: plat: Add R-Car V3M support by Valentine Barshak · 6 years ago