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git01.mediatek.com / filogic / atf / dbfc201e309330b3dce9ce7813e6d3ae1c18d4ec
  1. dbfc201 Merge pull request #852 from dp-arm/dp/fiptool-embed-image by davidcunado-arm · Tue Mar 07 14:44:44 2017 +0100
  2. 18e5bc4 Merge pull request #863 from vwadekar/tegra-changes-from-downstream-v4 by davidcunado-arm · Sat Mar 04 00:56:46 2017 +0000
  3. 87f0fa8 Merge pull request #854 from rockchip-linux/pm_plat by davidcunado-arm · Fri Mar 03 23:29:01 2017 +0000
  4. 3fb854f Tegra: enable SEPARATE_CODE_AND_RODATA build flag by Varun Wadekar · Tue Feb 28 08:23:59 2017 -0800
  5. 3ecb021 rockchip: Change the callback implement of power domain for rk3368 by tony.xie · Fri Mar 03 16:22:12 2017 +0800
  6. 20e9fef Tegra210: assert if afflvl0/1 have incorrect state-ids by Harvey Hsieh · Wed Dec 28 21:53:18 2016 +0800
  7. e0f3dfd Tegra: SiP: 64-bit address for Video Memory base by Harvey Hsieh · Tue Oct 11 18:59:52 2016 +0800
  8. 2c60b0a Tegra: increase ADDR_SPACE_SIZE to 35 bits by Steven Kao · Thu Nov 24 19:24:37 2016 +0800
  9. 777baa5 Tegra: init the console only if the platform supports it by Damon Duan · Mon Nov 07 19:37:50 2016 +0800
  10. 1edb882 Tegra210: new TZDRAM base address by Varun Wadekar · Thu Sep 01 14:59:32 2016 -0700
  11. dba8007 Tegra210: set core power state during cluster power down by Varun Wadekar · Thu Sep 01 14:56:17 2016 -0700
  12. 14eaede Tegra: calculate proper power state for affinity levels by Varun Wadekar · Thu Sep 01 14:51:59 2016 -0700
  13. bfc6605 Tegra: fix logic to calculate GICD_ISPENDR register address by Varun Wadekar · Tue Aug 23 14:01:19 2016 -0700
  14. a2c6be6 Tegra: uninit and re-init console across System Suspend by Varun Wadekar · Mon Aug 01 22:16:21 2016 -0700
  15. 28dcc21 Tegra: support for silicon/simulation platforms by Varun Wadekar · Wed Jul 20 10:28:51 2016 -0700
  16. 053024d Merge pull request #859 from Summer-ARM/sq/update-doc by danh-arm · Thu Mar 02 17:03:12 2017 +0000
  17. 0a7e27c Merge pull request #853 from vwadekar/tegra-changes-from-downstream-v3 by davidcunado-arm · Thu Mar 02 15:27:33 2017 +0000
  18. 358c5f5 Update LOAD_IMAGE_V2 user guide documentation by Summer Qin · Wed Feb 22 14:04:15 2017 +0000
  19. 422d51c rockchip: plat_pm.c: Change callbacks implement for our SOCs. by tony.xie · Wed Mar 01 11:05:17 2017 +0800
  20. f2aa1be Tegra: per-soc `get_target_pwr_state` handler by Varun Wadekar · Tue Jun 07 12:00:06 2016 -0700
  21. b41a414 Tegra: relocate BL32 image to TZDRAM memory by Varun Wadekar · Mon May 23 15:56:14 2016 -0700
  22. 3f745b2 stdlib: add memcpy16() to string.h by Varun Wadekar · Mon Mar 21 10:22:12 2016 -0700
  23. d22d4ad Tegra: get BL31 arguments from previous bootloader by Varun Wadekar · Mon May 23 11:41:07 2016 -0700
  24. 197a75f Tegra: return BL32 entry point info if it is valid by Varun Wadekar · Mon Jun 06 10:46:28 2016 -0700
  25. 5118b53 Tegra: configure TZDRAM fence during early setup by Varun Wadekar · Sat Jun 04 22:08:50 2016 -0700
  26. d5f578a Tegra: restore TZRAM settings on "System Resume" by Varun Wadekar · Wed Jun 01 19:34:37 2016 -0700
  27. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · Thu May 12 13:43:33 2016 -0700
  28. c6c386d Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1 by Varun Wadekar · Fri May 20 16:21:22 2016 -0700
  29. dc79930 Tegra: implement FIQ interrupt handler by Varun Wadekar · Mon Dec 28 16:36:42 2015 -0800
  30. b7b4575 Tegra: GIC: enable FIQ interrupt handling by Varun Wadekar · Mon Dec 28 14:55:41 2015 -0800
  31. 8f87cc3 cpus: denver: remove barrier from denver_enable_dco() by Varun Wadekar · Fri May 06 16:35:30 2016 -0700
  32. 2497539 Tegra: implement common handler `plat_get_target_pwr_state()` by Varun Wadekar · Thu May 05 14:13:30 2016 -0700
  33. 25e658e Tegra: include platform_def.h to access UART macros by Varun Wadekar · Tue Apr 26 11:38:38 2016 -0700
  34. 2330edd Tegra: allow SiP smc calls from Secure World by Wayne Lin · Thu Mar 31 13:49:09 2016 -0700
  35. 3f0a8ad Tegra: handler for per-soc early setup by Varun Wadekar · Mon Mar 28 15:56:47 2016 -0700
  36. 1ec441e Tegra: relocate code to BL31_BASE during cold boot by Varun Wadekar · Thu Mar 24 15:34:24 2016 -0700
  37. 72a4b69 Merge pull request #851 from jeenu-arm/assert-fix by danh-arm · Tue Feb 28 12:07:55 2017 +0000
  38. 1cc176b Merge pull request #848 from douglas-raillard-arm/dr/improve_errata_doc by danh-arm · Tue Feb 28 12:07:32 2017 +0000
  39. fbaab04 Merge pull request #847 from douglas-raillard-arm/dr/fix_abort_smc by danh-arm · Tue Feb 28 12:06:54 2017 +0000
  40. faafd7e Merge pull request #837 from douglas-raillard-arm/dr/fix_tools_cflags by danh-arm · Tue Feb 28 11:58:12 2017 +0000
  41. 79fa1a4 Tegra: Disable A57/A53 cache non-temporal hints by Varun Wadekar · Mon Mar 21 11:18:40 2016 -0700
  42. e8f7e1d Merge pull request #835 from rockchip-linux/rk3399-atf-cleanup-20170210 by davidcunado-arm · Mon Feb 27 15:25:45 2017 +0000
  43. afa1efa fiptool: Embed a pointer to an image within the image descriptor by dp-arm · Tue Feb 14 15:22:13 2017 +0000
  44. 5e6dcbb Merge pull request #849 from vwadekar/tegra-changes-from-downstream-v2 by davidcunado-arm · Mon Feb 27 14:41:24 2017 +0000
  45. d81abf1 rockchip: rk3399: enable secure accessing for SRAM by Xing Zheng · Tue Feb 14 18:03:20 2017 +0800
  46. be2a895 rockchip: rk3399: Use tFC value instead of tRFC value by Derek Basehore · Thu Feb 09 22:08:48 2017 -0800
  47. b07dfeb rockchip: rk3399: Fix CAS latency setting by Derek Basehore · Thu Feb 09 22:02:42 2017 -0800
  48. 035d6d6 rockchip: rk3399: disable training modules after DDR DFS by Xing Zheng · Thu Feb 09 14:51:38 2017 +0800
  49. 397046c rockchip: rk3399: Move DQS drive strength setting to M0 by Derek Basehore · Wed Feb 01 18:09:13 2017 -0800
  50. b734ba5 rockchip: rk3399: Remove dram dfs optimization by Derek Basehore · Tue Jan 31 16:37:01 2017 -0800
  51. 04c74b9 rockchip: rk3399: Save and restore RX_CAL_DQS values by Derek Basehore · Tue Jan 31 00:20:19 2017 -0800
  52. 84afaaf rockchip: Add MIN() and MAX() macros back to M0 code by Julius Werner · Mon Jan 30 18:26:07 2017 -0800
  53. f585246 rockchip: Clean up M0 Makefile, clarify float-abi by Julius Werner · Mon Jan 30 16:13:21 2017 -0800
  54. 22a9871 rockchip: rk3399: Clean up and seprate secure parts from SoC codes by Xing Zheng · Fri Feb 24 14:56:41 2017 +0800
  55. c39aacd rockchip: rk3399: sperate the BL31 parameters for sharing by Xing Zheng · Thu Dec 22 18:34:14 2016 +0800
  56. 5e1e48f rockchip: rk3399: configure the DDR secure region for BL31 image by Xing Zheng · Fri Feb 24 14:47:51 2017 +0800
  57. b4bcc1d rockchip: Clean up header and referenced files by Xing Zheng · Fri Feb 24 16:26:11 2017 +0800
  58. fc0552d rockchip: rk3399: Don't wait for vblank in M0 for ddrfreq by Derek Basehore · Mon Jan 09 15:38:57 2017 -0800
  59. 2510366 rockchip: rk3399: restore PMU_CRU_GATEDIS_CON0 value after ddr dvfs by Lin Huang · Fri Dec 30 11:50:01 2016 +0800
  60. 8140b7d rockchip: rk3399: fix PMU_CRU_GATEDIS_CON0 setting error by Lin Huang · Fri Dec 30 13:53:25 2016 +0800
  61. 61230b0 FIXUP: rockchip: rk3399: fix the incorrect bit during m0_init by Xing Zheng · Tue Dec 20 20:44:41 2016 +0800
  62. b4a7676 rockchip: rk3399: improve the m0 enable flow by Lin Huang · Mon Dec 12 15:18:08 2016 +0800
  63. 3b0eb7e rockchip: rk3399: check vop status when we wait dma finish flag by Lin Huang · Thu Dec 01 16:55:05 2016 +0800
  64. e7c2422 rockchip: rk3399: add stopwatch functions to m0 by Lin Huang · Wed Nov 30 16:57:08 2016 +0800
  65. 52512c2 rockchip: rk3399: dram: set all ddr frequency pll_postdiv values to 0 by Lin Huang · Thu Dec 15 15:08:47 2016 +0800
  66. dc8e82e rockchip: rk3399: enable CA training when do ddr dfs by Lin Huang · Fri Dec 16 13:59:07 2016 +0800
  67. c8e5c78 rockchip: rk3399: fix hang in ddr set rate by Derek Basehore · Fri Feb 24 14:33:03 2017 +0800
  68. 0e8909d rockchip: rk3399: Enable per CS training at 666MHz by Derek Basehore · Wed Nov 09 18:28:19 2016 -0800
  69. e13bc54 rockchip: rk3399: add support for ddrfreq suspend/resume by Derek Basehore · Fri Feb 24 14:31:36 2017 +0800
  70. 93280b7 rk3399: dram: use PMU M0 to do ddr frequency scaling by Xing Zheng · Wed Oct 26 21:25:26 2016 +0800
  71. b9be54b rockchip/rk3399: Cleanup platform.mk file by Derek Basehore · Thu Oct 20 16:19:22 2016 -0700
  72. aae6be4 rockchip: update the raw read/write APIs for M0 by Xing Zheng · Mon Oct 24 21:06:25 2016 +0800
  73. b106512 rk3399: dram: making phy into dll bypass mode at low frequency by Derek Basehore · Thu Oct 20 22:09:22 2016 -0700
  74. ff461d0 rockchip: rk3399: dram: remove dram_init and dts_timing_receive function by Derek Basehore · Thu Oct 20 20:46:43 2016 -0700
  75. d22429d Tegra: implement pwr_domain_pwr_down_wfi() handler by Varun Wadekar · Fri Mar 18 14:35:28 2016 -0700
  76. d151363 Tegra: memmap BL31's TZDRAM carveout by Varun Wadekar · Fri Mar 18 13:01:12 2016 -0700
  77. e032363 Tegra: increase BL31 image size to 256KB by Varun Wadekar · Thu Mar 03 18:27:28 2016 -0800
  78. 6eec6d6 Tegra: allow individual SoCs to restore their settings by Varun Wadekar · Thu Mar 03 13:28:10 2016 -0800
  79. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · Mon Feb 22 11:09:41 2016 -0800
  80. 6077dce Tegra: enable PSCI extended state ID processing by Varun Wadekar · Wed Jan 27 11:31:06 2016 -0800
  81. 3ce5499 Tegra: define platform power states by Varun Wadekar · Tue Jan 19 13:55:19 2016 -0800
  82. 0dc9181 Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM by Varun Wadekar · Wed Dec 30 15:06:41 2015 -0800
  83. 1dcffa9 Tegra: enable runtime console by Varun Wadekar · Fri Jan 08 17:48:42 2016 -0800
  84. e5caeed Tegra: PM: soc-specific system off handler by Varun Wadekar · Thu Jan 07 14:04:21 2016 -0800
  85. 923d04a Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · Wed Dec 09 18:18:53 2015 -0800
  86. 43e89d3 spd: trusty: OEN_TAP_START aperture for standard calls by Amith · Wed Aug 19 20:13:12 2015 -0700
  87. 3acb2b0 Merge pull request #845 from vwadekar/tegra-changes-from-downstream-v1 by davidcunado-arm · Thu Feb 23 17:30:54 2017 +0000
  88. c847f66 Clarify errata ERRATA_A53_836870 documentation by Douglas Raillard · Wed Feb 15 17:38:43 2017 +0000
  89. bcc3dd3 Fix TSPD implementation of STD SMC ABORT by Douglas Raillard · Fri Feb 03 18:01:51 2017 +0000
  90. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · Thu Oct 29 10:37:28 2015 +0530
  91. 6bb6246 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · Tue Oct 06 12:49:31 2015 +0530
  92. 7a9a285 Tegra: Memory Controller Driver (v1) by Varun Wadekar · Fri Sep 18 11:21:22 2015 +0530
  93. baf903e Tegra: sanity check members of the "from_bl2" struct by Varun Wadekar · Tue Sep 22 15:00:06 2015 +0530
  94. 3c337a6 cpus: Add support for all Denver variants by Varun Wadekar · Thu Sep 03 17:15:06 2015 +0530
  95. 8f8482b Remove redundant assert by Jeenu Viswambharan · Tue Feb 21 16:01:31 2017 +0000
  96. 39f87d1 Tegra: use ClusterId for calculating core position by Varun Wadekar · Tue Sep 22 13:45:07 2015 +0530
  97. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · Tue Sep 22 13:33:56 2015 +0530
  98. 97f2490 Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform by Varun Wadekar · Wed Sep 09 11:29:24 2015 +0530
  99. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · Thu Sep 03 14:32:44 2015 +0530
  100. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · Tue Aug 25 17:01:06 2015 +0530