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git01.mediatek.com / filogic / atf / dbcc95ce99d0ac185d0c0ddf1a857f961bd311f1 / plat / nvidia / tegra / soc / t186 / plat_memctrl.c
  1. 07f970d Tegra186: store TZDRAM base/size to scratch registers by Varun Wadekar · 6 years ago
  2. 17fb18e Tegra186: memctrl: lock stream id security config by Pritesh Raithatha · 6 years ago
  3. 1cd88d8 Tegra186: remove ENABLE_AFI_DEVICE macro usage by Varun Wadekar · 6 years ago
  4. ae18d22 Tegra186: memctrl: disable stream id writes for MC clients by Krishna Reddy · 7 years ago
  5. a457f2e Tegra: memctrl_v2: platform handler for TZDRAM setup by Steven Kao · 7 years ago
  6. 186485e Tegra: rename secure scratch register macros by Steven Kao · 7 years ago
  7. f3cd509 Tegra: memctrl_v2: platform handler for TZDRAM settings by Varun Wadekar · 7 years ago
  8. cf8c0e2 Tegra: memctrl_v2: platform handlers to program MSS by Puneet Saxena · 7 years ago
  9. 0e07e45 Tegra: fix defects flagged by MISRA Rule 10.3 by Anthony Zhou · 7 years ago
  10. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  11. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  12. 9eb5db5 Tegra: memctrl_v2: platform handler for MC settings by Pritesh Raithatha · 8 years ago