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git01.mediatek.com / filogic / atf / d899a6fdcffdc99771ab11e491fa4da7cfa8bc98 / plat / rockchip / rk3399 / drivers / dram
  1. fc7df8d fix(rk3399/suspend): correct LPDDR4 resume sequence by Jimmy Brisson · Mon Jun 29 12:21:23 2020 -0500
  2. 1a7cadf fix(rockchip/rk3399): fix dram section placement by Patrick Georgi · Wed Jun 23 21:34:38 2021 +0200
  3. 7d0e3ba Enable -Wshadow always by Justin Chadwell · Tue Sep 17 15:21:50 2019 +0100
  4. 2b558a6 Update rockchip platform to not rely on undefined overflow behaviour by Justin Chadwell · Wed Jul 03 14:11:28 2019 +0100
  5. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  6. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  7. e0f2c3b rockchip: Move stdint header to the offending header file by Paul Kocialkowski · Wed Jun 13 20:37:25 2018 +0200
  8. f900a06 rockchip/rk3399: Add watchdog support in pmusram by Derek Basehore · Mon Apr 23 14:49:22 2018 -0700
  9. 00960ba rockchip/rk3399: Split M0 binary into two by Lin Huang · Fri Apr 20 15:55:21 2018 +0800
  10. e3691fa rockchip/rk3399: Fix sram_udelay by Derek Basehore · Fri Apr 06 16:45:24 2018 -0700
  11. ff957ed plat: fix switch statements to comply with MISRA rules by Jonathan Wright · Wed Mar 14 15:24:00 2018 +0000
  12. a14b8a3 rockchip/rk3399: do secure timer init in pmusram by Lin Huang · Sat May 27 17:47:01 2017 +0800
  13. 94bdbc4 rockchip/rk3399: use slice1 to restore ddr slice1 ~ slice4 by Lin Huang · Fri May 26 16:17:11 2017 +0800
  14. 1f8fdeb rockchip/rk3399: set ddr clock source back to dpll when ddr resume by Lin Huang · Wed May 17 16:14:37 2017 +0800
  15. e363146 Fix order of remaining platform #includes by Isla Mitchell · Fri Jul 14 10:46:32 2017 +0100
  16. bfb73e6 rockchip/rk3399: Move DRAM restore to PMUSRAM by Derek Basehore · Mon May 15 21:18:28 2017 -0700
  17. 7b4d898 rockchip/rk3399: convert to for-loops to save code space by Derek Basehore · Fri May 12 21:29:13 2017 -0700
  18. b175d02 rockchip/rk3399: Remove unneeded if statement by Derek Basehore · Wed May 10 23:22:02 2017 -0700
  19. 20110a2 rockchip/rk3399: Remove unneeded register sets by Derek Basehore · Wed May 10 21:59:31 2017 -0700
  20. 80b0176 rockchip/rk3399: remove unneeded DDR restore function by Derek Basehore · Sat May 06 23:22:23 2017 -0700
  21. 6af5af0 rockchip/rk3399: Save space for DRAM suspend data by Derek Basehore · Fri May 05 17:53:33 2017 -0700
  22. e22d31a rockchip/rk3399: fix DRAM gate training issue by Lin Huang · Wed Feb 22 18:24:55 2017 +0800
  23. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  24. 509f379 rockchip/rk3399: changed printf/tf_printf for console output by Caesar Wang · Thu Apr 06 08:40:24 2017 +0800
  25. e8f7e1d Merge pull request #835 from rockchip-linux/rk3399-atf-cleanup-20170210 by davidcunado-arm · Mon Feb 27 15:25:45 2017 +0000
  26. be2a895 rockchip: rk3399: Use tFC value instead of tRFC value by Derek Basehore · Thu Feb 09 22:08:48 2017 -0800
  27. b07dfeb rockchip: rk3399: Fix CAS latency setting by Derek Basehore · Thu Feb 09 22:02:42 2017 -0800
  28. 035d6d6 rockchip: rk3399: disable training modules after DDR DFS by Xing Zheng · Thu Feb 09 14:51:38 2017 +0800
  29. 397046c rockchip: rk3399: Move DQS drive strength setting to M0 by Derek Basehore · Wed Feb 01 18:09:13 2017 -0800
  30. b734ba5 rockchip: rk3399: Remove dram dfs optimization by Derek Basehore · Tue Jan 31 16:37:01 2017 -0800
  31. 04c74b9 rockchip: rk3399: Save and restore RX_CAL_DQS values by Derek Basehore · Tue Jan 31 00:20:19 2017 -0800
  32. 22a9871 rockchip: rk3399: Clean up and seprate secure parts from SoC codes by Xing Zheng · Fri Feb 24 14:56:41 2017 +0800
  33. b4bcc1d rockchip: Clean up header and referenced files by Xing Zheng · Fri Feb 24 16:26:11 2017 +0800
  34. b4a7676 rockchip: rk3399: improve the m0 enable flow by Lin Huang · Mon Dec 12 15:18:08 2016 +0800
  35. 52512c2 rockchip: rk3399: dram: set all ddr frequency pll_postdiv values to 0 by Lin Huang · Thu Dec 15 15:08:47 2016 +0800
  36. dc8e82e rockchip: rk3399: enable CA training when do ddr dfs by Lin Huang · Fri Dec 16 13:59:07 2016 +0800
  37. 0e8909d rockchip: rk3399: Enable per CS training at 666MHz by Derek Basehore · Wed Nov 09 18:28:19 2016 -0800
  38. e13bc54 rockchip: rk3399: add support for ddrfreq suspend/resume by Derek Basehore · Fri Feb 24 14:31:36 2017 +0800
  39. 93280b7 rk3399: dram: use PMU M0 to do ddr frequency scaling by Xing Zheng · Wed Oct 26 21:25:26 2016 +0800
  40. b106512 rk3399: dram: making phy into dll bypass mode at low frequency by Derek Basehore · Thu Oct 20 22:09:22 2016 -0700
  41. ff461d0 rockchip: rk3399: dram: remove dram_init and dts_timing_receive function by Derek Basehore · Thu Oct 20 20:46:43 2016 -0700
  42. a8954fc Replace some memset call by zeromem by Douglas Raillard · Thu Jan 26 15:54:44 2017 +0000
  43. f33eb2c rockchip: add support save/restore configuration for DDR during enter S3 by Caesar Wang · Thu Oct 27 01:13:16 2016 +0800
  44. 8bc1667 rockchip: Change dmc register accesses to ATF style for rk3399 by Caesar Wang · Thu Oct 27 01:12:47 2016 +0800
  45. a845690 rockchip: Break out common dram code for rk3399 by Caesar Wang · Thu Oct 27 01:12:34 2016 +0800
  46. 251a34d rockchip: SIP call use 32 bit return value for rk3399 by Caesar Wang · Sat Sep 10 06:25:29 2016 +0800
  47. 853559e rockchip: enable or disable auto power down base on frequency by Caesar Wang · Thu Aug 25 08:38:23 2016 +0800
  48. 9740bba rockchip: rk3399: add dram driver by Caesar Wang · Thu Aug 25 08:37:42 2016 +0800