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filogic
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atf
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d66c3ad12cb239567df5705b9c55e1ca5d6d5c7d
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plat
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rockchip
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rk3399
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drivers
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pmu
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m0_ctl.c
2b558a6
Update rockchip platform to not rely on undefined overflow behaviour
by Justin Chadwell
· 5 years ago
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· 6 years ago
00960ba
rockchip/rk3399: Split M0 binary into two
by Lin Huang
· 6 years ago
e363146
Fix order of remaining platform #includes
by Isla Mitchell
· 7 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 7 years ago
22a9871
rockchip: rk3399: Clean up and seprate secure parts from SoC codes
by Xing Zheng
· 7 years ago
8140b7d
rockchip: rk3399: fix PMU_CRU_GATEDIS_CON0 setting error
by Lin Huang
· 8 years ago
61230b0
FIXUP: rockchip: rk3399: fix the incorrect bit during m0_init
by Xing Zheng
· 8 years ago
b4a7676
rockchip: rk3399: improve the m0 enable flow
by Lin Huang
· 8 years ago
c8e5c78
rockchip: rk3399: fix hang in ddr set rate
by Derek Basehore
· 7 years ago
93280b7
rk3399: dram: use PMU M0 to do ddr frequency scaling
by Xing Zheng
· 8 years ago