Log - d1771c6dd741a7f43280790f5e5d4910ac692609 - filogic/atf

7555ab7 ARMv7 requires the clear exclusive access at monitor entry by Etienne Carriere · Wed Nov 08 13:49:12 2017 +0100
4168f2f Init and save / restore of PMCR_EL0 / PMCR by David Cunado · Mon Oct 02 17:41:39 2017 +0100
dc0fea7 bl32: add secure interrupt handling in AArch32 sp_min by Etienne Carriere · Wed Aug 09 15:48:53 2017 +0200
fee8653 Fully initialise essential control registers by David Cunado · Thu Apr 13 22:38:29 2017 +0100
f3e3a43 AArch32: Rework SMC context save and restore mechanism by Soby Mathew · Thu Mar 30 14:42:54 2017 +0100
fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
043fe9c PSCI: Build option to enable D-Caches early in warmboot by Soby Mathew · Mon Apr 10 22:35:42 2017 +0100
1fecc8d Merge pull request #860 from jeenu-arm/hw-asstd-coh by davidcunado-arm · Fri Mar 17 12:34:37 2017 +0000
4ef91f1 Simplify translation tables headers dependencies by Antonio Nino Diaz · Mon Feb 20 14:22:22 2017 +0000
4614496 Enable data caches early with hardware-assisted coherency by Jeenu Viswambharan · Thu Jan 05 10:37:21 2017 +0000
adb7027 AArch32: Fix the stack alignment issue by Soby Mathew · Tue Dec 06 12:10:51 2016 +0000
06460cd AArch32: Refactor SP_MIN to support RESET_TO_SP_MIN by Yatharth Kochar · Thu Jun 30 15:02:31 2016 +0100
ec8ac1c AArch32: add a minimal secure payload (SP_MIN) by Soby Mathew · Thu May 05 14:32:05 2016 +0100