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git01.mediatek.com / filogic / atf / cebb1f2b62cfed1bf0ce35e67a903455a6ad4dec / plat / arm / board / fvp_ve / include
  1. 443ccbc refactor(plat/arm): replace FIP base and size macro with a generic name by Manish V Badarkhe · Thu Apr 22 11:13:21 2021 +0100
  2. 5e3ef6c plat/arm: Move fconf population after the enablement of MMU by Manish V Badarkhe · Thu Jul 16 05:45:25 2020 +0100
  3. 1da211a fconf: Clean confused naming between TB_FW and FW_CONFIG by Manish V Badarkhe · Sun May 31 10:17:59 2020 +0100
  4. 5586151 Create separate header for ARM specific SMCCC defines by Manish V Badarkhe · Fri Mar 27 13:25:51 2020 +0000
  5. 4287c0c Unify type of "cpu_idx" across PSCI module. by Deepika Bhavnani · Fri Dec 13 10:23:18 2019 -0600
  6. 8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · Tue Jul 09 14:02:43 2019 -0700
  7. 69bebd8 n1sdp: add code for DDR ECC enablement and BL33 copy to DDR by Manoj Kumar · Fri Jun 21 17:07:13 2019 +0100
  8. a43ae7c Add option for defining platform DRAM2 base by Sami Mujawar · Thu May 09 13:35:02 2019 +0100
  9. e97998f plat/arm: Introduce FVP Versatile Express platform. by Usama Arif · Fri Nov 30 15:43:56 2018 +0000