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git01.mediatek.com / filogic / atf / cd98f56adcdad98d90a1573ada7aa528dffc1ab5 / drivers / marvell / ap807_clocks_init.c
  1. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  2. 9a772df ble: ap807: Switch to PLL mode and update CPU frequency by Christine Gharzuzi · Mon Jun 25 13:39:37 2018 +0300