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git01.mediatek.com / filogic / atf / ccdb588a697784b7b8d1586d722a5b4d9fb2758d / plat / intel / soc / common / socfpga_sip_svc.c
  1. e59b999 intel: Fix Coverity Scan Defects by Abdul Halim, Muhammad Hadi Asyrafi · Tue Feb 11 20:17:05 2020 +0800
  2. c39a0e0 intel: Include address range check for SiP Mailbox by Abdul Halim, Muhammad Hadi Asyrafi · Thu Feb 06 19:18:41 2020 +0800
  3. a33e810 intel: Introduce SMC support for mailbox command by Hadi Asyrafi · Tue Dec 17 19:30:41 2019 +0800
  4. 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · Tue Dec 17 19:22:17 2019 +0800
  5. 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · Tue Dec 24 10:42:52 2019 +0800
  6. 0c6dae2 intel: FPGA config_isdone() status query by Hadi Asyrafi · Tue Dec 17 23:33:39 2019 +0800
  7. cee6aa9 intel: Change all global sip function to static by Hadi Asyrafi · Tue Dec 17 15:25:04 2019 +0800
  8. 6794230 intel: Enable SiP SMC secure register access by Hadi Asyrafi · Tue Oct 22 13:28:51 2019 +0800
  9. f3a7c14 intel: Fix SMC SIP service by Hadi Asyrafi · Tue Nov 12 16:29:03 2019 +0800
  10. 9dfc047 intel: Introduce mailbox response length handling by Hadi Asyrafi · Tue Nov 12 16:39:46 2019 +0800
  11. 500b232 plat: intel: Fix FPGA manager on reconfiguration by Tien Hock, Loh · Wed Oct 30 14:49:40 2019 +0800
  12. c516816 intel: Modify mailbox's get_config_status by Hadi Asyrafi · Mon Oct 21 16:25:07 2019 +0800
  13. ab1132f intel: Create SiP service header file by Hadi Asyrafi · Tue Oct 22 10:31:45 2019 +0800
  14. 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · Wed Oct 23 17:35:32 2019 +0800[Renamed (99%) from plat/intel/soc/agilex/socfpga_sip_svc.c]
  15. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · Wed Oct 23 18:34:14 2019 +0800
  16. 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · Thu Jun 27 11:34:03 2019 +0800