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git01.mediatek.com / filogic / atf / cca1d18d50347173b51c21af906d31f01b4bac8e / plat / xilinx / versal_net / plat_psci_pm.c
  1. 311dce7 fix(versal_net): evaluate condition for boolean by Maheedhar Bollapalli · 8 weeks ago
  2. b8c581f fix(xilinx): fix logic to read ipi response by Jay Buddhabhatti · 5 months ago
  3. 807f41b fix(xilinx): follow MISRA-C standards for condition check by Ronak Jain · 7 months ago
  4. b8eca3b fix(xilinx): check proc variable before use by Michal Simek · 7 months ago
  5. 31488a3 feat(xilinx): add new state to identify cpu power down by Jay Buddhabhatti · 1 year, 2 months ago
  6. 10e71e4 feat(xilinx): request cpu power down from reset by Jay Buddhabhatti · 1 year, 5 months ago
  7. b7bb1ed fix(versal-net): use arm common GIC handlers by Jay Buddhabhatti · 1 year, 2 months ago
  8. 7d0623a chore(xilinx): follow kernel doc format for functional documentation by Prasad Kummari · 1 year, 6 months ago
  9. 0129707 feat(xilinx): sync copyright format by Michal Simek · 1 year, 7 months ago
  10. 6cd94be fix(versal-net): correct aff level for cpu off by Jay Buddhabhatti · 1 year, 8 months ago
  11. 7c5adef fix(versal-net): fix setting power down state by Jay Buddhabhatti · 1 year, 11 months ago
  12. c6daff0 feat(versal-net): add support for platform management by Jay Buddhabhatti · 2 years, 3 months ago