1. 4a284a4 aarch32: Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  2. 8ca0af2 Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 by Dimitris Papastamos · 7 years ago
  3. 41b0094 Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS by Matt Ma · 7 years ago
  4. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 7 years ago
  5. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  6. 2b40ca6 aarch32: Implement errata workarounds for Cortex A57 by Dimitris Papastamos · 7 years ago
  7. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  8. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  9. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago