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filogic
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atf
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c613e7de6a604a60cf7f679466529819a25a8831
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plat
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nvidia
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tegra
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common
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tegra_sip_calls.c
76afaac
Tegra: remove weakly defined per-platform SiP handler
by Varun Wadekar
· 6 years ago
833d89c
Revert "Tegra: Add support for fake system suspend"
by Vignesh Radhakrishnan
· 7 years ago
48fef88
Tegra: SiP: set GPU in reset after vpr resize
by Jeetesh Burman
· 7 years ago
0e07e45
Tegra: fix defects flagged by MISRA Rule 10.3
by Anthony Zhou
· 7 years ago
4408e88
Tegra: common: fix defects flagged by MISRA scan
by Anthony Zhou
· 7 years ago
035f24b
Tegra: sip_calls: fix defects flagged by MISRA scan
by Anthony Zhou
· 7 years ago
e5bd345
Tegra: sip_calls: fix defects flagged by MISRA scan
by Anthony Zhou
· 7 years ago
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· 6 years ago
5ac9d96
Fix pointer type mismatch of handlers
by Masahiro Yamada
· 6 years ago
e363146
Fix order of remaining platform #includes
by Isla Mitchell
· 7 years ago
a59a7c5
Tegra: memctrl: check GPU reset state from common place
by Varun Wadekar
· 7 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 7 years ago
14f3957
Tegra186: Support AARCH32/64 encoding for MCE calls
by Varun Wadekar
· 7 years ago
b4a7294
Tegra: Add support for fake system suspend
by Vignesh Radhakrishnan
· 7 years ago
e0f3dfd
Tegra: SiP: 64-bit address for Video Memory base
by Harvey Hsieh
· 8 years ago
dc79930
Tegra: implement FIQ interrupt handler
by Varun Wadekar
· 9 years ago
2330edd
Tegra: allow SiP smc calls from Secure World
by Wayne Lin
· 8 years ago
923d04a
Tegra: handlers for common and SoC-specific SiP calls
by Varun Wadekar
· 9 years ago
[Renamed (82%) from plat/nvidia/tegra/soc/t210/plat_sip_calls.c]
3acb2b0
Merge pull request #845 from vwadekar/tegra-changes-from-downstream-v1
by davidcunado-arm
· 7 years ago