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git01.mediatek.com / filogic / atf / c59077037813d49bde9c2769c7002578098e22f8 / plat / nvidia / tegra / common
  1. 39f87d1 Tegra: use ClusterId for calculating core position by Varun Wadekar · 9 years ago
  2. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · 9 years ago
  3. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · 9 years ago
  4. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · 9 years ago
  5. a8954fc Replace some memset call by zeromem by Douglas Raillard · 8 years ago
  6. 21362a9 Introduce unified API to zero memory by Douglas Raillard · 8 years ago
  7. 0fac5af Move BL_COHERENT_RAM_BASE/END defines to common_def.h by Masahiro Yamada · 8 years ago
  8. 1723113 Migrate platform makefile to new console driver location by Soby Mathew · 8 years ago
  9. f6c4108 Include `plat_psci_common.c` from the new location by Soby Mathew · 9 years ago
  10. cc037c1 Migrate platform ports to the new xlat_tables library by Soby Mathew · 9 years ago
  11. e7ae6db Disable PL011 UART before configuring it by Juan Castillo · 9 years ago
  12. a78bb1b Tegra: remove support for legacy platform APIs by Varun Wadekar · 9 years ago
  13. b2baa89 Tegra: flowctrl: rename tegra_fc_cpu_idle() to tegra_fc_cpu_powerdn() by Varun Wadekar · 9 years ago
  14. 8b82fae Tegra: introduce per-soc system reset handler by Varun Wadekar · 9 years ago
  15. 4489ad1 Tegra: Perform cache maintenance on video carveout memory by Vikram Kanigiri · 9 years ago
  16. 1be2f97 Tegra: fix logic to clear videomem regions by Varun Wadekar · 9 years ago
  17. 4e9c231 Tegra210: wait for 512 timer ticks before retention entry by Varun Wadekar · 9 years ago
  18. e1eaf8e Tegra: memmap the actual memory available for BL31 by Varun Wadekar · 9 years ago
  19. c8bfe2e Tegra: retrieve BL32's bootargs from bl32_ep_info by Varun Wadekar · 9 years ago
  20. 0f3baa0 Tegra: Support for Tegra's T132 platforms by Varun Wadekar · 9 years ago
  21. 254441d Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · 9 years ago
  22. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · 9 years ago
  23. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · 9 years ago
  24. 30d8977 Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · 9 years ago
  25. fccf8e0 Tegra: PMC: check if a CPU is already online by Varun Wadekar · 9 years ago
  26. 85a90cf Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · 9 years ago
  27. bc74fec Tegra: introduce delay timer support by Varun Wadekar · 9 years ago
  28. 207cc73 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · 9 years ago
  29. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · 9 years ago
  30. d3a4150 Add missing features to the Tegra GIC driver by Varun Wadekar · 9 years ago
  31. f9aae8b Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · 9 years ago
  32. 7a269e2 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · 9 years ago
  33. 52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · 9 years ago
  34. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · 9 years ago