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filogic
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atf
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c5586d16a019c1feb8f7315818156aef1025cdf3
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plat
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intel
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soc
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n5x
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include
2cebbc6
Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration
by Madhukar Pappireddy
· Tue May 10 20:17:51 2022 +0200
a4a4327
feat(intel): implement timer init divider via cpu frequency. (#1)
by BenjaminLimJL
· Wed Apr 06 10:19:16 2022 +0800
82cf5df
feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge
by Sieu Mun Tang
· Thu May 05 17:07:21 2022 +0800
a544da1
fix(intel): make FPGA memory configurations platform specific
by Sieu Mun Tang
· Mon Feb 28 15:24:59 2022 +0800
8881ad0
build(intel): add N5X as a new Intel platform
by Sieu Mun Tang
· Mon Mar 07 12:04:59 2022 +0800