Log - c5586d16a019c1feb8f7315818156aef1025cdf3 - filogic/atf

183638f style: remove useless trailing semicolon and line continuations by Elyes Haouas · Mon Feb 13 10:05:41 2023 +0100
66b7fdc fix(bakery_lock): add __unused for clang by Okash Khawaja · Fri Apr 08 18:06:31 2022 +0100
019b4f8 locks: bakery: use is_dcache_enabled() helper by Masahiro Yamada · Thu Apr 02 15:35:19 2020 +0900
d3ad4c7 locks: bakery: add a DMB to the 'read_cache_op' macro by Varun Wadekar · Fri Jun 29 13:34:51 2018 -0700
c3c4400 T589: Fix insufficient ordering guarantees in bakery lock by Raghu Krishnamurthy · Sat Jan 25 19:20:45 2020 -0800
ad04201 Fix the CAS spinlock implementation by Soby Mathew · Wed Sep 25 14:03:41 2019 +0100
8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · Tue Jul 09 14:02:43 2019 -0700
3a377b2 Remove .arch directives from spinlock.S by Alexei Fedorov · Fri May 10 16:55:16 2019 +0100
77c382c locks: linker variables to calculate per-cpu bakery lock size by Varun Wadekar · Wed Jan 30 08:26:20 2019 -0800
e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
519248b bakery: Fix MISRA defects by Antonio Nino Diaz · Wed Oct 31 15:55:57 2018 +0000
dc9fab1 Remove all other deprecated interfaces and files by Antonio Nino Diaz · Tue Sep 25 09:39:51 2018 +0100
0ffd9e2 Add missing barriers to Bakery Locks by Jeenu Viswambharan · Wed Aug 08 14:10:55 2018 +0100
7a4e8f5 Fix MISRA Rule 5.3 Part 4 by Daniel Boulby · Wed May 09 11:29:07 2018 +0100
fef5d2d Fix MISRA Rule 5.3 Part 2 by Daniel Boulby · Fri May 04 14:04:07 2018 +0100
5cc3bc8 Clean usage of void pointers to access symbols by Joel Hutton · Wed Mar 21 11:40:57 2018 +0000
70b1c2f ARMv7 does not support STL instruction by Etienne Carriere · Sun Nov 05 22:55:47 2017 +0100
0bc79d9 Add macro to test for minimum architecture version by Jeenu Viswambharan · Wed Aug 16 11:44:25 2017 +0100
fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
077ab54 AArch32: Fix normal memory bakery compilation by Soby Mathew · Tue Feb 14 10:16:18 2017 +0000
fca7680 Introduce locking primitives using CAS instruction by Jeenu Viswambharan · Mon Jan 16 16:52:35 2017 +0000
f9baaa5 Fix normal memory bakery lock implementation by Soby Mathew · Mon Nov 14 17:19:35 2016 +0000
748be1d AArch32: Add support in TF libraries by Soby Mathew · Thu May 05 14:10:46 2016 +0100
7b5c9b3 Move spinlock library code to AArch64 folder by Soby Mathew · Mon Aug 08 12:42:53 2016 +0100
a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · Thu Jun 16 14:52:04 2016 +0100
e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · Thu Sep 10 11:39:36 2015 +0100
3700a92 PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · Mon Jul 13 11:21:11 2015 +0100
a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
156280c Remove the `owner` field in bakery_lock_t data structure by Soby Mathew · Fri Feb 20 16:04:17 2015 +0000
a0a897d Optimize the bakery lock structure for coherent memory by Soby Mathew · Thu Feb 19 16:23:51 2015 +0000
523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · Thu Jan 08 18:02:19 2015 +0000
6b98c7d Remove the wfe() for bounded wait in bakery_lock by Soby Mathew · Tue Nov 18 10:45:04 2014 +0000
ed04c4a Precede a 'sev' with a 'dsb' in bakery lock code by Achin Gupta · Mon Nov 10 11:50:30 2014 +0000
958cc02 Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · Mon Jun 09 12:54:15 2014 +0100
ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
e2712bc Always use named structs in header files by Dan Handley · Thu Apr 10 15:37:22 2014 +0100
a70615f Move include and source files to logical locations by Dan Handley · Wed Apr 09 12:48:25 2014 +0100