1. c4c4dec Merge "intel: Fix Coverity Scan Defects" into integration by Sandrine Bailleux · Thu Feb 20 09:53:26 2020 +0000
  2. e59b999 intel: Fix Coverity Scan Defects by Abdul Halim, Muhammad Hadi Asyrafi · Tue Feb 11 20:17:05 2020 +0800
  3. 0ee577d Merge changes I72846d86,I70c3d873,If675796a,I0dbf8091,Ie4f3ac83, ... into integration by Sandrine Bailleux · Wed Feb 19 15:29:23 2020 +0000
  4. cfa3aea board/rdn1edge: use CREATE_SEQ helper macro to compare chip count by Vijayenthiran Subramaniam · Wed Feb 12 13:26:33 2020 +0530
  5. 59ca6f8 Merge changes from topic "corstone700" into integration by Manish Pandey · Tue Feb 18 21:47:38 2020 +0000
  6. ea0424f FVP: Fix BL31 load address and image size for RESET_TO_BL31=1 by Alexei Fedorov · Mon Feb 17 13:38:35 2020 +0000
  7. 5be00c0 corstone700: set UART clocks to 32MHz by Vishnu Banavath · Wed Aug 07 10:49:05 2019 +0100
  8. d46b58c corstone700: clean-up as per coding style guide by Avinash Mehta · Thu Jul 11 16:23:43 2019 +0100
  9. 368564c Corstone700: add support for mhuv2 in arm TF-A by Khandelwal · Wed Jan 29 16:51:42 2020 +0000
  10. 17f1c05 rcar_gen3: plat: Minor coding style fix for rcar_version.h by Marek Vasut · Sun Feb 09 11:57:24 2020 +0100
  11. bc18a08 rcar_gen3: plat: Update IPL and Secure Monitor Rev.2.0.6 by Yoshifumi Hosoya · Fri Feb 07 11:23:33 2020 +0900
  12. cc5999f rcar_gen3: plat: Update IPL and Secure Monitor Rev.2.0.5 by Toshiyuki Ogasahara · Fri Dec 13 14:50:30 2019 +0900
  13. 04f1628 rcar_gen3: plat: Change fixed destination address of BL31 and BL32 by Toshiyuki Ogasahara · Fri Dec 13 14:43:52 2019 +0900
  14. 5f349ef Merge "fconf: Move remaining arm platform to fconf" into integration by Sandrine Bailleux · Fri Feb 14 14:39:44 2020 +0000
  15. 59cb7c4 Merge changes from topic "uniphier" into integration by Sandrine Bailleux · Fri Feb 14 08:26:05 2020 +0000
  16. 406ac20 corstone700: adding support for stack protector for the FVP by Morten Borup Petersen · Wed Jan 29 16:44:17 2020 +0000
  17. d1e527d Merge changes from topic "uniphier" into integration by Sandrine Bailleux · Thu Feb 13 09:37:27 2020 +0000
  18. 7f95059 Merge "intel: Change boot source selection" into integration by Sandrine Bailleux · Wed Feb 12 15:54:02 2020 +0000
  19. bc0fdde Merge changes Ib68092d1,I816ea14e into integration by Sandrine Bailleux · Wed Feb 12 15:51:42 2020 +0000
  20. 9fdfae3 fconf: Move remaining arm platform to fconf by Louis Mayencourt · Wed Feb 12 09:26:09 2020 +0000
  21. 15fdeef Merge "Fixes ROTPK hash generation for ECDSA encryption" into integration by joanna.farley · Wed Feb 12 08:46:46 2020 +0000
  22. 1a741d9 uniphier: make I/O register region configurable by Masahiro Yamada · Mon Feb 03 19:46:15 2020 +0900
  23. 3d436a9 uniphier: extend boot device detection for future SoCs by Masahiro Yamada · Mon Feb 03 19:28:13 2020 +0900
  24. 4e37140 uniphier: make PSCI related base address configurable by Masahiro Yamada · Mon Feb 03 19:46:00 2020 +0900
  25. b33206a uniphier: change block_addressing flag to bool by Masahiro Yamada · Mon Feb 03 18:40:37 2020 +0900
  26. 0317e1b uniphier: make counter control base address configurable by Masahiro Yamada · Mon Feb 03 19:45:37 2020 +0900
  27. d28d1a7 uniphier: change the return value type of .is_usb_boot() to bool by Masahiro Yamada · Tue Jan 28 21:14:28 2020 +0900
  28. ca971b5 uniphier: make UART base address configurable by Masahiro Yamada · Mon Feb 03 19:45:16 2020 +0900
  29. 9e33b02 uniphier: make pinmon base address configurable by Masahiro Yamada · Mon Feb 03 19:33:35 2020 +0900
  30. 6ebf638 uniphier: make NAND controller base address configurable by Masahiro Yamada · Mon Feb 03 19:30:27 2020 +0900
  31. 24782e2 uniphier: make eMMC controller base address configurable by Masahiro Yamada · Mon Feb 03 19:30:11 2020 +0900
  32. 94eb27f Merge changes from topic "lm/fconf" into integration by Sandrine Bailleux · Tue Feb 11 16:15:45 2020 +0000
  33. 7b753d9 Fixes ROTPK hash generation for ECDSA encryption by Max Shvetsov · Tue Feb 11 12:41:08 2020 +0000
  34. 26c2740 Merge changes from topic "spmd" into integration by Olivier Deprez · Tue Feb 11 08:34:47 2020 +0000
  35. bcc0ade Merge "coverity: Fix MISRA null pointer violations" into integration by Mark Dykes · Mon Feb 10 17:20:53 2020 +0000
  36. 35f4cb6 Merge "fvp: Slightly Bump the stack size for bl1 and bl2" into integration by Manish Pandey · Mon Feb 10 16:56:11 2020 +0000
  37. 0b23feb Merge changes from topic "amlogic/axg" into integration by Manish Pandey · Mon Feb 10 14:31:27 2020 +0000
  38. 60b7b8a SPMD: enable SPM dispatcher support by Achin Gupta · Fri Oct 11 15:50:43 2019 +0100
  39. e97351d SPMD: add support to run BL32 in TDRAM and BL31 in secure DRAM on Arm FVP by Achin Gupta · Fri Oct 11 15:15:19 2019 +0100
  40. da6ef0e SPMD: add support for an example SPM core manifest by Achin Gupta · Fri Oct 11 14:54:48 2019 +0100
  41. 2af8c3e Merge changes from topics "rddaniel", "rdn1edge_dual" into integration by Manish Pandey · Mon Feb 10 13:32:43 2020 +0000
  42. bf04d8f Merge "intel: Include address range check for SiP Mailbox" into integration by Sandrine Bailleux · Mon Feb 10 08:23:53 2020 +0000
  43. 9e57142 Merge "qemu: define ARMV7_SUPPORTS_VFP" into integration by Sandrine Bailleux · Fri Feb 07 15:08:46 2020 +0000
  44. e650895 plat/arm: add board support for rd-daniel platform by Aditya Angadi · Sun Jul 21 22:13:45 2019 +0530
  45. c8330e7 board/rde1edge: fix incorrect topology tree description by Vijayenthiran Subramaniam · Wed Jan 29 22:00:59 2020 +0530
  46. 64c9645 plat/arm/sgi: move GIC related constants to board files by Vijayenthiran Subramaniam · Mon Feb 03 12:14:01 2020 +0530
  47. bc48991 plat/arm/sgi: introduce number of chips macro by Vijayenthiran Subramaniam · Thu Dec 26 17:45:58 2019 +0530
  48. 03f58bf platform/arm/sgi: add multi-chip mode parameter in HW_CONFIG dts by Vijayenthiran Subramaniam · Wed Oct 30 12:52:25 2019 +0530
  49. c4e68a4 board/rdn1edge: add support for dual-chip configuration by Vijayenthiran Subramaniam · Mon Oct 28 14:49:48 2019 +0530
  50. 7f8837b drivers/arm/scmi: allow use of multiple SCMI channels by Aditya Angadi · Tue Dec 31 14:23:53 2019 +0530
  51. 7b424ba drivers/mhu: derive doorbell base address by Aditya Angadi · Tue Dec 31 10:14:32 2019 +0530
  52. dde6d3e plat/arm/sgi: include AFF3 affinity in core position calculation by Vijayenthiran Subramaniam · Tue Oct 29 15:56:41 2019 +0530
  53. 2478f8e plat/arm/sgi: add macros for remote chip device region by Vijayenthiran Subramaniam · Mon Oct 28 14:49:48 2019 +0530
  54. 8af1843 plat/arm/sgi: add chip_id and multi_chip_mode to platform variant info by Vijayenthiran Subramaniam · Tue Oct 22 15:46:14 2019 +0530
  55. 2b4ad8d plat/arm/sgi: move bl31_platform_setup to board file by Vijayenthiran Subramaniam · Mon Sep 23 19:32:32 2019 +0530
  56. 7d24ce1 arm-io: Panic in case of io setup failure by Louis Mayencourt · Wed Jan 29 14:43:06 2020 +0000
  57. 70d7c09 MISRA fix: Use boolean essential type by Louis Mayencourt · Wed Jan 29 11:42:31 2020 +0000
  58. badcac8 fconf: Move platform io policies into fconf by Louis Mayencourt · Thu Oct 24 15:18:46 2019 +0100
  59. 5b9055f fconf: Add mbedtls shared heap as property by Louis Mayencourt · Tue Oct 01 10:45:14 2019 +0100
  60. 4da9b31 fconf: Add TBBR disable_authentication property by Louis Mayencourt · Mon Sep 30 10:57:24 2019 +0100
  61. 6d2b573 fconf: Add dynamic config DTBs info as property by Louis Mayencourt · Tue Dec 17 13:17:25 2019 +0000
  62. 81bd916 fconf: Populate properties from dtb during bl2 setup by Louis Mayencourt · Thu Oct 17 15:14:25 2019 +0100
  63. 5a15b2d fconf: Load config dtb from bl1 by Louis Mayencourt · Thu Oct 17 14:46:51 2019 +0100
  64. 944ade8 fconf: initial commit by Louis Mayencourt · Thu Aug 08 12:03:26 2019 +0100
  65. decc8dd qemu: define ARMV7_SUPPORTS_VFP by Jerome Forissier · Fri Feb 07 11:13:46 2020 +0100
  66. e1debf8 Merge changes from topic "sip-svc" into integration by Sandrine Bailleux · Fri Feb 07 08:03:37 2020 +0000
  67. ea1faa2 Merge "Adds option to read ROTPK from registers for FVP" into integration by Sandrine Bailleux · Fri Feb 07 07:46:53 2020 +0000
  68. c39a0e0 intel: Include address range check for SiP Mailbox by Abdul Halim, Muhammad Hadi Asyrafi · Thu Feb 06 19:18:41 2020 +0800
  69. 815c125 Merge "xilinx: versal: Pass result count to pm_get_callbackdata()" into integration by Mark Dykes · Thu Feb 06 20:44:38 2020 +0000
  70. 0275120 Merge "plat: xilinx: zynqmp: Use ARRAY_SIZE wherever possible" into integration by Mark Dykes · Thu Feb 06 20:43:58 2020 +0000
  71. 06dba29 Adds option to read ROTPK from registers for FVP by Max Shvetsov · Fri Dec 06 11:50:12 2019 +0000
  72. 2cef2d3 fvp: Slightly Bump the stack size for bl1 and bl2 by Louis Mayencourt · Fri Jan 17 16:10:45 2020 +0000
  73. eba155a amlogic: axg: Add a build flag when using ATOS as BL32 by Carlo Caione · Mon Jan 27 16:03:28 2020 +0100
  74. d9ce7b1 amlogic: axg: Add support for the A113D (AXG) platform by Carlo Caione · Fri Jan 24 16:20:15 2020 +0100
  75. e8dadb1 coverity: Fix MISRA null pointer violations by Zelalem · Wed Feb 05 14:12:39 2020 -0600
  76. 157aef4 Tegra194: mce: declare nvg_roc_clean_cache_trbits() by Varun Wadekar · Wed Feb 05 11:00:33 2020 -0800
  77. 01431ca Merge changes from topic "tegra-downstream-01242020" into integration by Manish Pandey · Wed Feb 05 10:11:44 2020 +0000
  78. a33e810 intel: Introduce SMC support for mailbox command by Hadi Asyrafi · Tue Dec 17 19:30:41 2019 +0800
  79. 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · Tue Dec 17 19:22:17 2019 +0800
  80. 5b21082 Merge "Coverity: remove unnecessary header file includes" into integration by Mark Dykes · Tue Feb 04 17:15:57 2020 +0000
  81. 39ca69d Merge changes from topic "mp/separate_nobits" into integration by Sandrine Bailleux · Tue Feb 04 16:37:09 2020 +0000
  82. 87675d4 Coverity: remove unnecessary header file includes by Zelalem · Mon Feb 03 14:56:42 2020 -0600
  83. 29c65f7 Merge "intel: agilex: Enable uboot BL31 loading" into integration by Manish Pandey · Tue Feb 04 13:42:36 2020 +0000
  84. bbea3b8 Merge "FDT wrappers: add functions for read/write bytes" into integration by Manish Pandey · Mon Feb 03 13:45:47 2020 +0000
  85. 2de82fc FDT wrappers: add functions for read/write bytes by Alexei Fedorov · Wed Jan 29 16:21:28 2020 +0000
  86. 786db4d intel: Change boot source selection by Hadi Asyrafi · Mon Dec 30 16:00:30 2019 +0800
  87. 17fb18e Tegra186: memctrl: lock stream id security config by Pritesh Raithatha · Thu May 31 12:06:15 2018 +0530
  88. 953699c Tegra194: remove support for simulated system suspend by Varun Wadekar · Wed Jun 06 17:26:10 2018 -0700
  89. fc463c5 Tegra194: mce: fix multiple MISRA issues by Varun Wadekar · Fri May 25 16:17:53 2018 -0700
  90. d11345a Tegra: bpmp: fix multiple MISRA issues by Varun Wadekar · Fri May 25 14:34:53 2018 -0700
  91. 35cc90a Tegra194: se: fix multiple MISRA issues by Varun Wadekar · Fri May 25 15:22:58 2018 -0700
  92. 29b4665 Tegra: compile PMC driver for Tegra132/Tegra210 platforms by Varun Wadekar · Thu May 17 11:10:13 2018 -0700
  93. d292e5d Tegra: memctrl_v2: remove weakly defined TZDRAM setup handler by Varun Wadekar · Thu May 17 10:42:18 2018 -0700
  94. 76afaac Tegra: remove weakly defined per-platform SiP handler by Varun Wadekar · Thu May 17 10:14:30 2018 -0700
  95. b5b15b2 Tegra: remove weakly defined PSCI platform handlers by Varun Wadekar · Thu May 17 10:10:25 2018 -0700
  96. 7cf57d7 Tegra: remove weakly defined platform setup handlers by Varun Wadekar · Thu May 17 09:36:38 2018 -0700
  97. 1b0c124 Tegra: per-SoC DRAM base values by Varun Wadekar · Tue May 15 11:24:59 2018 -0700
  98. f618f18 plat: marvell: armada: scp_bl2: allow loading up to 8 images by Grzegorz Jaszczyk · Thu Apr 04 14:38:55 2019 +0200
  99. 17e43dd plat: marvell: armada: add support for loading MG CM3 images by Grzegorz Jaszczyk · Fri Aug 18 16:42:12 2017 +0200
  100. 5b433b6 xilinx: versal: Pass result count to pm_get_callbackdata() by Tejas Patel · Wed Jan 29 22:09:55 2020 -0800