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git01.mediatek.com / filogic / atf / c33d8f0c8c385c98c454b9b046216814db30dcb3 / include / arch / aarch32 / el3_common_macros.S
  1. b0d69e8 fix(pie): invalidate data cache in the entire image range if PIE is enabled by Zelalem Aweke · Fri Oct 15 17:25:52 2021 -0500
  2. 8ce3394 feat(trf): initialize trap settings of trace filter control registers access by Manish V Badarkhe · Sun Jul 18 02:26:27 2021 +0100
  3. f7ee064 feat(sys_reg_trace): initialize trap settings of trace system registers access by Manish V Badarkhe · Wed Jul 07 16:27:10 2021 +0100
  4. 514e59c Add PIE support for AARCH32 by Yann Gautier · Mon Oct 05 11:02:54 2020 +0200
  5. e57bce8 Avoid the use of linker *_SIZE__ macros by Yann Gautier · Tue Aug 18 14:42:41 2020 +0200
  6. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · Mon Nov 23 18:38:15 2020 +0000
  7. c241b57 el3_entrypoint_common: avoid overwriting arg3 by Yann Gautier · Tue Jan 28 11:45:38 2020 +0100
  8. d2f21b8 Add missing support for BL2_AT_EL3 in XIP memory by Lionel Debieve · Mon May 27 09:32:00 2019 +0200
  9. 9074dea AArch32: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 20 15:22:44 2019 +0100
  10. 457c64e aarch32: Allow compiling with soft-float toolchain by Manish Pandey · Mon Apr 01 15:27:18 2019 +0100
  11. 404184d Merge pull request #1831 from antonio-nino-diaz-arm/an/sccd by Antonio Niño Díaz · Wed Feb 27 09:21:42 2019 +0000
  12. 078e66f plat/arm: Support for Cortex A5 in FVP Versatile Express platform by Usama Arif · Wed Dec 12 17:14:29 2018 +0000
  13. 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · Mon Feb 18 16:55:43 2019 +0000
  14. 8d1ade6 Reorganize architecture-dependent header files by Antonio Nino Diaz · Mon Dec 17 17:20:57 2018 +0000[Renamed from include/common/aarch32/el3_common_macros.S]
  15. 0f3a004 Merge pull request #1731 from miyatsu/doc-fix-20181225 by Antonio Niño Díaz · Fri Jan 04 09:14:22 2019 +0000