1. 9faad3c Add support for Neoverse-N2 CPUs. by Javier Almansa Sobrino · Fri Oct 23 13:22:07 2020 +0100
  2. c2db651 fdts: n1sdp: DTS file for single-chip and multi-chip environment. by Andre Przywara · Mon Jul 06 11:19:41 2020 +0530
  3. e1cc130 GICv3: GIC-600: Detect GIC-600 at runtime by Andre Przywara · Wed Mar 25 15:50:38 2020 +0000
  4. 84f1b5d TF-A GICv3 driver: Introduce makefile by Alexei Fedorov · Mon Mar 23 18:45:17 2020 +0000
  5. 1852eba Merge "n1sdp: Enable the NEOVERSE_N1_EXTERNAL_LLC flag" into integration by Manish Pandey · Thu Mar 12 10:09:31 2020 +0000
  6. b912087 n1sdp: Enable the NEOVERSE_N1_EXTERNAL_LLC flag by Chandni Cherukuri · Thu Mar 05 11:49:57 2020 +0530
  7. 2f13d6c TF-A GICv3 driver: Separate GICD and GICR accessor functions by Alexei Fedorov · Fri Feb 21 10:17:26 2020 +0000
  8. 2c44a44 n1sdp: setup multichip gic routing table by Manish Pandey · Mon Oct 14 17:37:38 2019 +0100
  9. 69bebd8 n1sdp: add code for DDR ECC enablement and BL33 copy to DDR by Manoj Kumar · Fri Jun 21 17:07:13 2019 +0100
  10. 20b4841 plat/arm: introduce wrapper functions to setup secure watchdog by Aditya Angadi · Tue Apr 16 11:29:14 2019 +0530
  11. 56369c1 Rename Cortex-Ares to Neoverse N1 by John Tsichritzis · Tue Feb 19 13:49:06 2019 +0000
  12. b66a18e plat/arm/n1sdp: define the uart constants for N1SDP by Deepak Pandey · Tue Dec 18 17:10:24 2018 +0530
  13. 9cbacf6 plat/arm: Introduce the N1SDP. by Deepak Pandey · Wed Aug 08 10:32:51 2018 +0530