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git01.mediatek.com / filogic / atf / c1503120a0451600367a41ac96ac9e579dc612f4 / include / lib / aarch64 / arch.h
  1. fa2b736 Merge pull request #1197 from dp-arm/dp/amu by davidcunado-arm · Fri Jan 12 09:02:24 2018 +0000
  2. 525c37a AMU: Add configuration helpers for aarch64 by Dimitris Papastamos · Mon Nov 13 09:49:45 2017 +0000
  3. 43e05ec Use PFR0 to identify need for mitigation of CVE-2017-5915 by Dimitris Papastamos · Tue Jan 02 15:53:01 2018 +0000
  4. c52ebdc Workaround for CVE-2017-5715 on Cortex A73 and A75 by Dimitris Papastamos · Mon Dec 18 13:46:21 2017 +0000
  5. ce88eee Enable SVE for Non-secure world by David Cunado · Fri Oct 20 11:30:57 2017 +0100
  6. e08005a AMU: Implement support for aarch64 by Dimitris Papastamos · Thu Oct 12 13:02:29 2017 +0100
  7. 004216b Merge pull request #1163 from antonio-nino-diaz-arm/an/parange by davidcunado-arm · Thu Nov 23 00:39:55 2017 +0000
  8. 5bdbb47 Refactor Statistical Profiling Extensions implementation by Dimitris Papastamos · Fri Oct 13 12:06:06 2017 +0100
  9. b9ef664 Add ARMv8.2 ID_AA64MMFR0_EL1.PARange value by Antonio Nino Diaz · Fri Nov 17 09:52:53 2017 +0000
  10. 1dc771b ARM platforms: Provide SDEI entry point validation by Jeenu Viswambharan · Thu Oct 19 09:15:15 2017 +0100
  11. c41f206 SPM: Introduce Secure Partition Manager by Antonio Nino Diaz · Tue Oct 24 10:07:35 2017 +0100
  12. c444fcf Merge pull request #1130 from jeenu-arm/gic-patches by davidcunado-arm · Sat Oct 21 22:18:48 2017 +0100
  13. ab14e9b GIC: Add API to raise secure SGI by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  14. b1e957e GIC: Add API to get running priority by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  15. 4168f2f Init and save / restore of PMCR_EL0 / PMCR by David Cunado · Mon Oct 02 17:41:39 2017 +0100
  16. 502ca97 Merge pull request #1105 from antonio-nino-diaz-arm/an/epd1-bit by davidcunado-arm · Mon Sep 25 23:34:28 2017 +0100
  17. f94e40d Fix type of `unsigned long` constants by Antonio Nino Diaz · Thu Sep 14 15:57:44 2017 +0100
  18. c8274a8 Set TCR_EL1.EPD1 bit to 1 by Antonio Nino Diaz · Fri Sep 15 10:30:34 2017 +0100
  19. 02c6307 Helper macro to create MAIR encodings by Isla Mitchell · Fri Jul 21 14:44:36 2017 +0100
  20. c4a1a07 Enable CnP bit for ARMv8.2 CPUs by Isla Mitchell · Mon Aug 07 11:20:13 2017 +0100
  21. ee3457b aarch64: Enable Statistical Profiling Extensions for lower ELs by dp-arm · Tue May 23 09:32:49 2017 +0100
  22. fee8653 Fully initialise essential control registers by David Cunado · Thu Apr 13 22:38:29 2017 +0100
  23. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · Thu May 25 18:04:48 2017 -0700
  24. 6715485 Merge pull request #927 from jeenu-arm/state-switch by davidcunado-arm · Thu May 11 16:04:52 2017 +0100
  25. bc1a929 Introduce ARM SiP service to switch execution state by Jeenu Viswambharan · Thu Feb 16 14:55:15 2017 +0000
  26. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  27. 2a9b882 Add macro to check whether the CPU implements an EL by Jeenu Viswambharan · Tue Feb 21 14:40:44 2017 +0000
  28. 7d99b6c Merge branch 'integration' into tf_issue_461 by Scott Branden · Sat Apr 29 08:36:12 2017 -0700
  29. bf404c0 Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · Mon Apr 10 11:45:52 2017 -0700
  30. ede39cb Changes to support execution in AArch32 state for JUNO by Yatharth Kochar · Mon Nov 14 12:01:04 2016 +0000
  31. b4a7294 Tegra: Add support for fake system suspend by Vignesh Radhakrishnan · Fri Mar 03 10:58:05 2017 -0800
  32. d4acf20 Merge pull request #879 from Summer-ARM/sq/mt-support by davidcunado-arm · Tue Mar 28 18:15:20 2017 +0100
  33. 93c812f ARM platforms: Add support for MT bit in MPIDR by Summer Qin · Tue Feb 28 16:46:17 2017 +0000
  34. ac99803 Add dynamic region support to xlat tables lib v2 by Antonio Nino Diaz · Mon Feb 27 17:23:54 2017 +0000
  35. 595d0d5 Disable secure self-hosted debug via MDCR_EL3/SDCR by dp-arm · Wed Feb 08 11:51:50 2017 +0000
  36. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · Tue Jan 03 11:01:51 2017 +0000
  37. d1beee2 Add PLAT_xxx_ADDR_SPACE_SIZE definitions by Antonio Nino Diaz · Tue Dec 13 15:28:54 2016 +0000
  38. 5f55e28 Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR by David Cunado · Mon Oct 31 17:37:34 2016 +0000
  39. a993c42 Unify SCTLR initialization for AArch32 normal world by Soby Mathew · Thu Sep 29 14:15:57 2016 +0100
  40. d48ae61 Automatically select initial xlation lookup level by Antonio Nino Diaz · Tue Aug 02 09:21:41 2016 +0100
  41. c53ac5e Move SIZE_FROM_LOG2_WORDS macro to utils.h by Soby Mathew · Wed Jul 20 14:38:36 2016 +0100
  42. 44170c4 Refactor the xlat_tables library code by Soby Mathew · Tue Mar 22 15:51:08 2016 +0000
  43. 851dc7e Add ISR_EL1 to crash report by Gerald Lejeune · Tue Mar 22 11:11:46 2016 +0100
  44. 52b1ba6 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · Tue Mar 01 14:01:03 2016 +0000
  45. 92712a5 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · Thu Sep 03 14:18:02 2015 +0100
  46. 94efd1f Add missing RES1 bit in SCTLR_EL1 by Vikram Kanigiri · Wed Jul 22 11:53:52 2015 +0100
  47. 0cdebbd Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · Mon Mar 30 17:15:16 2015 +0100
  48. 4e97e54 Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · Thu Feb 26 15:25:58 2015 +0000
  49. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · Thu Dec 04 14:14:12 2014 +0000
  50. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · Mon Sep 22 12:11:36 2014 +0100
  51. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · Thu Sep 04 10:23:27 2014 +0200
  52. 798140d Juno: Implement initial platform port by Sandrine Bailleux · Thu Jul 17 16:06:39 2014 +0100
  53. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · Thu Aug 14 16:19:29 2014 +0100
  54. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · Thu Aug 14 13:36:41 2014 +0100
  55. 8e2f287 Add CPU specific power management operations by Soby Mathew · Thu Aug 14 12:49:05 2014 +0100
  56. c704cbc Introduce framework for CPU specific operations by Soby Mathew · Thu Aug 14 11:33:56 2014 +0100
  57. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  58. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · Fri Jun 27 16:56:30 2014 -0700
  59. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · Wed Jun 04 21:10:52 2014 +0100
  60. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · Mon Jun 02 15:44:43 2014 +0100
  61. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  62. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 12:00:17 2014 +0100
  63. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · Sun May 04 18:38:28 2014 +0100
  64. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · Tue May 13 14:42:08 2014 +0100
  65. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  66. bcd60ba Separate BL functions out of arch.h by Dan Handley · Thu Apr 17 18:53:42 2014 +0100
  67. a70615f Move include and source files to logical locations by Dan Handley · Wed Apr 09 12:48:25 2014 +0100[Renamed from include/aarch64/arch.h]
  68. 992dc07 Merge pull request #50 from vikramkanigiri/vk/tf-issues#26 by achingupta · Thu May 01 13:16:33 2014 +0100