1. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  2. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 9 years ago
  3. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  4. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · 9 years ago
  5. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 9 years ago
  6. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 9 years ago
  7. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 9 years ago
  8. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 9 years ago
  9. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 9 years ago
  10. afa8a78 Fix wording in cpu-ops.mk comments by Sandrine Bailleux · 9 years ago
  11. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · 9 years ago
  12. f12a31d Cortex-Axx: Unconditionally apply CPU reset operations by Sandrine Bailleux · 9 years ago
  13. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 9 years ago
  14. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 9 years ago
  15. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · 9 years ago
  16. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · 9 years ago
  17. e364a8a Fix recursive crash prints on FVP AEM model by Soby Mathew · 10 years ago
  18. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  19. 632432b Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · 10 years ago
  20. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 10 years ago
  21. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  22. b5a6304 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 10 years ago
  23. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  24. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  25. 937488b Optimize Cortex-A57 cluster power down sequence on Juno by Soby Mathew · 10 years ago
  26. 1604fa0 Optimize barrier usage during Cortex-A57 power down by Soby Mathew · 10 years ago
  27. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  28. 42aa5eb Add support for level specific cache maintenance operations by Soby Mathew · 10 years ago
  29. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  30. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  31. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  32. f1785fd Add platform API for reset handling by Soby Mathew · 10 years ago
  33. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago