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git01.mediatek.com / filogic / atf / bf360df58088d88ac3c8fc3430304b98abb76683 / plat / arm
  1. 81899f1 Remove FIRST_RESET_HANDLER_CALL build option by Sandrine Bailleux · 9 years ago
  2. 2ae2319 FVP: Correct the PSYSR_WK bit width in platform_get_entrypoint by Soby Mathew · 10 years ago
  3. da797f6 Always enable CCI coherency in BL3-1 by Sandrine Bailleux · 9 years ago
  4. 73003ac CSS: Extract primary cpu id using the correct bit width by Soby Mathew · 9 years ago
  5. fd3f415 Fix return type of FVP plat_arm_topology_setup by Dan Handley · 10 years ago
  6. 7da652d Detect SCP version incompatibility by Sandrine Bailleux · 10 years ago
  7. 04b66d8 Move to the new ARM SCP Messaging Interfaces by Sandrine Bailleux · 10 years ago
  8. 8e930fe Move Juno port to plat/arm/board/juno by Dan Handley · 10 years ago
  9. d617f66 Move FVP port to plat/arm/board/fvp by Dan Handley · 10 years ago
  10. 9df4804 Add common ARM and CSS platform code by Dan Handley · 10 years ago