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filogic
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atf
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bd603bf781a80fb49b78659a5f5657f45f1762f7
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plat
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intel
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soc
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n5x
/
platform.mk
f48707a
feat(intel): implement timer init divider via CPU frequency for N5X
by Sieu Mun Tang
· 2 years, 2 months ago
11b9b49
refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3
by Arvind Ram Prakash
· 1 year, 9 months ago
55803a2
fix(intel): fix UART baud rate and clock
by Sieu Mun Tang
· 2 years, 2 months ago
044ed48
feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands
by Sieu Mun Tang
· 2 years, 3 months ago
1e5550b
build(intel): enable access to on-chip ram in BL31 for N5X
by Boon Khai Ng
· 3 years, 3 months ago
dbcc2cf
fix(intel): fix ECC Double Bit Error handling
by Sieu Mun Tang
· 2 years, 6 months ago
f3a5d02
build(intel): define a macro for SIMICS build
by Abdul Halim, Muhammad Hadi Asyrafi
· 4 years, 2 months ago
8881ad0
build(intel): add N5X as a new Intel platform
by Sieu Mun Tang
· 2 years, 6 months ago