Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
bb533c7defc509d45c76cf3e12a98b6be57f7b7c
/
plat
/
rockchip
/
rk3399
/
drivers
/
m0
/
src
df76b44
rk3399: m0: Fix compiler warnings.
by Christoph Müllner
· 5 years ago
00960ba
rockchip/rk3399: Split M0 binary into two
by Lin Huang
· 6 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 7 years ago
397046c
rockchip: rk3399: Move DQS drive strength setting to M0
by Derek Basehore
· 8 years ago
b4bcc1d
rockchip: Clean up header and referenced files
by Xing Zheng
· 7 years ago
fc0552d
rockchip: rk3399: Don't wait for vblank in M0 for ddrfreq
by Derek Basehore
· 8 years ago
2510366
rockchip: rk3399: restore PMU_CRU_GATEDIS_CON0 value after ddr dvfs
by Lin Huang
· 8 years ago
3b0eb7e
rockchip: rk3399: check vop status when we wait dma finish flag
by Lin Huang
· 8 years ago
e7c2422
rockchip: rk3399: add stopwatch functions to m0
by Lin Huang
· 8 years ago
93280b7
rk3399: dram: use PMU M0 to do ddr frequency scaling
by Xing Zheng
· 8 years ago
aae6be4
rockchip: update the raw read/write APIs for M0
by Xing Zheng
· 8 years ago
b400374
rockchip: add M0 source code and build system for RK3399
by Caesar Wang
· 8 years ago