Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
b9ae5db49332c2cb835654c09ecd68cece5fdc0e
/
plat
/
xilinx
/
zynqmp
/
zynqmp_def.h
69fb5bf
zynqmp: pm: Minor corrections for MISRA compliance
by Jolly Shah
· 7 years ago
393c0a2
zynqmp: pm: Add IOCTLs for global storage access
by Rajan Vaja
· 7 years ago
d98455b
zynqmp: pm: Implement clock APIs
by Rajan Vaja
· 7 years ago
aea41bb
zynqmp: pm: Implement IOCTL APIs for device control
by Rajan Vaja
· 7 years ago
5529a01
zynqmp: pm: Implement IOCTL APIs for remoteproc
by Rajan Vaja
· 7 years ago
0ac2be1
zynqmp: pm: Implement pin control APIs for get/set functions
by Rajan Vaja
· 7 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 8 years ago
1209b26
zynqmp: Remove dead code
by Soren Brinkmann
· 8 years ago
836418d
zynqmp: Fix UART1 base address
by Soren Brinkmann
· 8 years ago
cfcb1a2
zynqmp: Do not alter system counter
by Soren Brinkmann
· 8 years ago
cf4e714
zynqmp: Add RW access to L2ACTLR_EL1 and CPUACTLR_EL1
by Naga Sureshkumar Relli
· 8 years ago
99c0d7b
zynqmp: Add option to select between Cadence UARTs
by Soren Brinkmann
· 8 years ago
845cd5c
zynqmp: Reduce mapped memory area
by Soren Brinkmann
· 9 years ago
ef8f559
zynqmp: FSBL->ATF handover
by Michal Simek
· 9 years ago
b43d943
zynqmp: Introduce zynqmp_get_bootmode
by Soren Brinkmann
· 9 years ago
4a9ca04
zynqmp: Revise memory configuration options
by Soren Brinkmann
· 9 years ago
76fcae3
Add support for Xilinx Zynq UltraScale+ MPSOC
by Soren Brinkmann
· 9 years ago