1. 4cce835 ARMv7 may not support Virtualization Extensions by Etienne Carriere · Wed Nov 08 14:38:33 2017 +0100
  2. 70b1c2f ARMv7 does not support STL instruction by Etienne Carriere · Sun Nov 05 22:55:47 2017 +0100
  3. 97ad6ce cpu log buffer size depends on cache line size by Etienne Carriere · Fri Sep 01 10:22:20 2017 +0200
  4. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  5. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · Thu Nov 10 16:17:51 2016 +0000
  6. 54ec86a Allow spin locks to be defined from assembly by Jeenu Viswambharan · Thu Jan 19 14:23:36 2017 +0000
  7. 68aef10 Define and use no_ret macro where no return is expected by Jeenu Viswambharan · Wed Nov 30 15:21:11 2016 +0000
  8. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · Tue Jun 28 16:58:26 2016 +0100
  9. d29f67b AArch32: Add assembly helpers by Soby Mathew · Thu May 05 12:31:57 2016 +0100